|
| 1 | +;=========================== begin_copyright_notice ============================ |
| 2 | +; |
| 3 | +; Copyright (C) 2025 Intel Corporation |
| 4 | +; |
| 5 | +; SPDX-License-Identifier: MIT |
| 6 | +; |
| 7 | +;============================ end_copyright_notice ============================= |
| 8 | +; REQUIRES: llvm-14-plus, regkeys |
| 9 | +; |
| 10 | +; RUN: igc_opt --opaque-pointers -platformbmg -igc-emit-visa %s -regkey DumpVISAASMToConsole | FileCheck %s |
| 11 | +; ------------------------------------------------ |
| 12 | +; EmitVISAPass |
| 13 | +; ------------------------------------------------ |
| 14 | + |
| 15 | +; This test verifies stack-related variables initilization in case a kernel |
| 16 | +; uses VLA, but it doesn't use stack calls. In such scenario, stack-related |
| 17 | +; variables can be initilized in a very limited scope, meaning that only stack |
| 18 | +; pointer and frame pointer need to be initilized. Additionally, stack and |
| 19 | +; frame pointer don't need to be initilized as predefined %sp and %fp VISA |
| 20 | +; variables, they can just be a regular VISA variables. |
| 21 | + |
| 22 | +; CHECK-NOT: .decl SP{{.*}} alias=<%sp, 0> |
| 23 | +; CHECK-NOT: .decl FP{{.*}} alias=<%fp, 0> |
| 24 | +; CHECK-NOT: .decl ARGV{{.*}} alias=<%arg, 0> |
| 25 | +; CHECK-NOT: .decl RETV{{.*}} alias=<%retval, 0> |
| 26 | + |
| 27 | +; CHECK: add (M1_NM, 1) SP(0,0)<1> privateBase(0,0)<0;1,0> {{.*}}(0,0)<0;1,0> |
| 28 | +; CHECK: mov (M1_NM, 1) FP(0,0)<1> SP(0,0)<0;1,0> |
| 29 | + |
| 30 | +define spir_kernel void @test(ptr addrspace(1) %in, ptr addrspace(1) %out, <8 x i32> %r0, <8 x i32> %payloadHeader, ptr %privateBase, i32 %bufferOffset, i16 %localIdX, i16 %localIdY, i16 %localIdZ) #0 { |
| 31 | +entry: |
| 32 | + %vlaSize = load i32, ptr addrspace(1) %in, align 4 |
| 33 | + %vlaStackAlloca = call ptr @llvm.genx.GenISA.VLAStackAlloca(i32 0, i32 %vlaSize) |
| 34 | + %lidX = zext i16 %localIdX to i32 |
| 35 | + store i32 %lidX, ptr %vlaStackAlloca |
| 36 | + ; ... some other basic blocks here ... |
| 37 | + %val = load i32, ptr %vlaStackAlloca |
| 38 | + store i32 %val, ptr addrspace(1) %out |
| 39 | + ret void |
| 40 | +} |
| 41 | + |
| 42 | +declare ptr @llvm.genx.GenISA.VLAStackAlloca(i32, i32) |
| 43 | + |
| 44 | +attributes #0 = { "hasVLA" } |
| 45 | + |
| 46 | +!IGCMetadata = !{!0} |
| 47 | +!igc.functions = !{!22} |
| 48 | + |
| 49 | +!0 = !{!"ModuleMD", !1, !21} |
| 50 | +!1 = !{!"FuncMD", !2, !3} |
| 51 | +!2 = !{!"FuncMDMap[0]", ptr @test} |
| 52 | +!3 = !{!"FuncMDValue[0]", !4, !17} |
| 53 | +!4 = !{!"resAllocMD", !5} |
| 54 | +!5 = !{!"argAllocMDList", !6, !10, !11, !14, !15, !16, !31, !32} |
| 55 | +!6 = !{!"argAllocMDListVec[0]", !7, !8, !9} |
| 56 | +!7 = !{!"type", i32 0} |
| 57 | +!8 = !{!"extensionType", i32 -1} |
| 58 | +!9 = !{!"indexType", i32 -1} |
| 59 | +!10 = !{!"argAllocMDListVec[1]", !7, !8, !9} |
| 60 | +!11 = !{!"argAllocMDListVec[2]", !12, !8, !13} |
| 61 | +!12 = !{!"type", i32 1} |
| 62 | +!13 = !{!"indexType", i32 0} |
| 63 | +!14 = !{!"argAllocMDListVec[3]", !7, !8, !9} |
| 64 | +!15 = !{!"argAllocMDListVec[4]", !7, !8, !9} |
| 65 | +!16 = !{!"argAllocMDListVec[5]", !7, !8, !9} |
| 66 | +!17 = !{!"m_OpenCLArgTypeQualifiers", !18, !19, !20} |
| 67 | +!18 = !{!"m_OpenCLArgTypeQualifiersVec[0]", !""} |
| 68 | +!19 = !{!"m_OpenCLArgTypeQualifiersVec[1]", !""} |
| 69 | +!20 = !{!"m_OpenCLArgTypeQualifiersVec[2]", !""} |
| 70 | +!21 = !{!"isHDCFastClearShader", i1 false} |
| 71 | +!22 = !{ptr @test, !23} |
| 72 | +!23 = !{!24, !25} |
| 73 | +!24 = !{!"function_type", i32 0} |
| 74 | +!25 = !{!"implicit_arg_desc", !26, !27, !28, !29} |
| 75 | +!26 = !{i32 0} |
| 76 | +!27 = !{i32 1} |
| 77 | +!28 = !{i32 12} |
| 78 | +!29 = !{i32 14, !29} |
| 79 | +!30 = !{!"explicit_arg_num", i32 2} |
| 80 | +!31 = !{!"argAllocMDListVec[6]", !7, !8, !9} |
| 81 | +!32 = !{!"argAllocMDListVec[7]", !7, !8, !9} |
0 commit comments