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matborzyszkowskiigcbot
matborzyszkowski
authored and
igcbot
committed
Add PTL support
Add PTL support part2
1 parent c6c3bc2 commit e426eb8

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61 files changed

+1604
-338
lines changed

‎IGC/AdaptorCommon/RayTracing/AutoGenRTStackAccessPrivateOS.h

Lines changed: 66 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1735,46 +1735,80 @@ auto* _syncStackToShadowMemory_Xe(Value* arg_0, Value* arg_1, Value* arg_2, Valu
17351735
auto* BB_5 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
17361736
auto* BB_6 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
17371737
auto* BB_7 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
1738+
auto* BB_8 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
1739+
auto* BB_9 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
1740+
auto* BB_10 = BasicBlock::Create(*Ctx.getLLVMContext(), VALUE_NAME("_syncStackToShadowMemory_Xe."), _JoinBB->getParent(), _JoinBB);
17381741
SetInsertPoint(BB_4);
1739-
auto* V_8 = CreateBitCast(arg_1, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1740-
auto* V_9 = CreateBitCast(arg_0, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1741-
auto* V_10 = CreateInBoundsGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(1), getInt32(3) });
1742-
auto* V_11 = CreateLoad(getInt32Ty(), V_10);
1743-
auto* V_12 = CreateAnd(V_11, getInt32(268435456));
1744-
auto* V_13 = CreateICmpEQ(V_12, getInt32(0));
1745-
CreateCondBr(V_13, BB_5, BB_7);
1742+
auto* V_11 = CreateBitCast(arg_1, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1743+
auto* V_12 = CreateBitCast(arg_0, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1744+
auto* V_13 = CreateInBoundsGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(1), getInt32(3) });
1745+
auto* V_14 = CreateLoad(getInt32Ty(), V_13);
1746+
auto* V_15 = CreateAnd(V_14, getInt32(268435456));
1747+
auto* V_16 = CreateICmpEQ(V_15, getInt32(0));
1748+
CreateCondBr(V_16, BB_5, BB_10);
17461749
SetInsertPoint(BB_5);
17471750
createReadSyncTraceRay(arg_2);
17481751
CreateStore(getInt32(3), arg_3);
1749-
auto* V_14 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(1), getInt32(0) });
1750-
auto* V_15 = CreateBitCast(V_14, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1751-
auto* V_16 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(1), getInt32(0) });
1752-
auto* V_17 = CreateBitCast(V_16, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1753-
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_15, V_17, getInt64(32), getFalse() }, nullptr);
1754-
auto* V_18 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(3), getInt32(0), getInt64(0) });
1755-
auto* V_19 = CreateBitCast(V_18, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1756-
auto* V_20 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(3), getInt32(0), getInt64(0) });
1757-
auto* V_21 = CreateBitCast(V_20, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1758-
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_19, V_21, getInt64(24), getFalse() }, nullptr);
1759-
auto* V_22 = CreateInBoundsGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(0), getInt32(3) });
1760-
auto* V_23 = CreateLoad(getInt32Ty(), V_22);
1761-
auto* V_24 = CreateAnd(V_23, getInt32(65536));
1762-
auto* V_25 = CreateICmpEQ(V_24, getInt32(0));
1763-
auto* V_26 = CreateLoad(getInt32Ty(), V_10);
1764-
auto* V_27 = CreateAnd(V_26, getInt32(268435456));
1765-
auto* V_28 = CreateICmpEQ(V_27, getInt32(0));
1766-
CreateCondBr(V_25, BB_7, BB_6);
1752+
auto* V_17 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(1), getInt32(0) });
1753+
auto* V_18 = CreateBitCast(V_17, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1754+
auto* V_19 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(1), getInt32(0) });
1755+
auto* V_20 = CreateBitCast(V_19, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1756+
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_18, V_20, getInt64(32), getFalse() }, nullptr);
1757+
auto* V_21 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(3), getInt32(0), getInt64(0) });
1758+
auto* V_22 = CreateBitCast(V_21, PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()));
1759+
auto* V_23 = CreateGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(3), getInt32(0), getInt64(0) });
1760+
auto* V_24 = CreateBitCast(V_23, PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()));
1761+
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_22, V_24, getInt64(24), getFalse() }, nullptr);
1762+
auto* V_25 = isRayQueryReturnOptimizationEnabled();
1763+
CreateCondBr(V_25, BB_6, BB_7);
17671764
SetInsertPoint(BB_6);
1768-
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_8, V_9, getInt64(32), getFalse() }, nullptr);
1769-
CreateBr(BB_7);
1765+
auto* V_26 = CreateLoad(getInt32Ty(), V_13);
1766+
auto* V_27 = CreateShl(arg_2, getInt32(28));
1767+
auto* V_28 = CreateAnd(V_27, getInt32(268435456));
1768+
auto* V_29 = CreateAnd(V_26, getInt32(4025614335));
1769+
auto* V_30 = CreateAnd(arg_2, getInt32(8));
1770+
auto* V_31 = CreateICmpEQ(V_30, getInt32(0));
1771+
auto* V_32 = CreateSelect(V_31, getInt32(524288), getInt32(393216));
1772+
auto* V_33 = CreateOr(V_32, V_28);
1773+
auto* V_34 = CreateOr(V_33, V_29);
1774+
auto* V_35 = CreateXor(V_34, getInt32(268435456));
1775+
CreateStore(V_35, V_13);
1776+
auto* V_36 = CreateAnd(arg_2, getInt32(6));
1777+
auto* V_37 = CreateICmpEQ(V_36, getInt32(0));
1778+
auto* V_38 = CreateICmpNE(V_28, getInt32(0));
1779+
CreateCondBr(V_37, BB_10, BB_9);
1780+
SetInsertPoint(BB_9);
1781+
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_11, V_12, getInt64(32), getFalse() }, nullptr);
1782+
auto* V_39 = CreateInBoundsGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_1, { getInt64(0), getInt32(0), getInt32(3) });
1783+
auto* V_40 = CreateLoad(getInt32Ty(), V_39);
1784+
auto* V_41 = CreateICmpEQ(V_36, getInt32(2));
1785+
auto* V_42 = CreateAnd(V_40, getInt32(4293984255));
1786+
auto* V_43 = CreateSelect(V_41, getInt32(589824), getInt32(458752));
1787+
auto* V_44 = CreateOr(V_42, V_43);
1788+
CreateStore(V_44, V_39);
1789+
CreateBr(BB_10);
17701790
SetInsertPoint(BB_7);
1771-
auto* V_29 = CreatePHI(getInt1Ty(), 3, _ReturnName);
1791+
auto* V_45 = CreateInBoundsGEP(_struct_RTStackFormat__RTStack(*Ctx.getModule()), arg_0, { getInt64(0), getInt32(0), getInt32(3) });
1792+
auto* V_46 = CreateLoad(getInt32Ty(), V_45);
1793+
auto* V_47 = CreateAnd(V_46, getInt32(65536));
1794+
auto* V_48 = CreateLoad(getInt32Ty(), V_13);
1795+
auto* V_49 = CreateICmpEQ(V_47, getInt32(0));
1796+
auto* V_50 = CreateAnd(V_48, getInt32(268435456));
1797+
auto* V_51 = CreateICmpEQ(V_50, getInt32(0));
1798+
CreateCondBr(V_49, BB_10, BB_8);
1799+
SetInsertPoint(BB_8);
1800+
CreateIntrinsic(Intrinsic::memcpy, { PointerType::get(getInt8Ty(), arg_1->getType()->getPointerAddressSpace()), PointerType::get(getInt8Ty(), arg_0->getType()->getPointerAddressSpace()), getInt64Ty() }, { V_11, V_12, getInt64(32), getFalse() }, nullptr);
1801+
CreateBr(BB_10);
1802+
SetInsertPoint(BB_10);
1803+
auto* V_52 = CreatePHI(getInt1Ty(), 5, _ReturnName);
17721804
CreateBr(_JoinBB);
1773-
V_29->addIncoming(V_28, BB_5);
1774-
V_29->addIncoming(getFalse(), BB_4);
1775-
V_29->addIncoming(V_28, BB_6);
1805+
V_52->addIncoming(V_38, BB_9);
1806+
V_52->addIncoming(V_38, BB_6);
1807+
V_52->addIncoming(getFalse(), BB_4);
1808+
V_52->addIncoming(V_51, BB_7);
1809+
V_52->addIncoming(V_51, BB_8);
17761810
SetInsertPoint(_CurIP);
1777-
return V_29;
1811+
return V_52;
17781812
}
17791813

17801814
auto* _getCommittedStatus_Xe(Value* arg_0, const Twine& _ReturnName = "")

‎IGC/AdaptorCommon/RayTracing/RTBuilder.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1854,6 +1854,10 @@ ConstantInt* RTBuilder::supportStochasticLod()
18541854
return getInt1(Ctx.platform.supportStochasticLod());
18551855
}
18561856

1857+
ConstantInt* RTBuilder::isRayQueryReturnOptimizationEnabled()
1858+
{
1859+
return getInt1(Ctx.platform.isRayQueryReturnOptimizationEnabled());
1860+
}
18571861

18581862

18591863
GenIntrinsicInst* RTBuilder::createDummyInstID(Value* pSrcVal)

‎IGC/AdaptorCommon/RayTracing/RTBuilder.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -458,6 +458,7 @@ class RTBuilder : public IGCIRBuilder<>
458458

459459
ConstantInt* supportStochasticLod();
460460

461+
ConstantInt* isRayQueryReturnOptimizationEnabled();
461462

462463

463464
GenIntrinsicInst* createDummyInstID(Value* pSrcVal);

‎IGC/AdaptorCommon/RayTracing/RTStackFormat.h

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1114,6 +1114,32 @@ enum CANDIDATE_TYPE : uint32_t
11141114
CANDIDATE_PROCEDURAL_PRIMITIVE
11151115
};
11161116

1117+
struct RayQueryReturnData
1118+
{
1119+
enum class Bits : uint8_t
1120+
{
1121+
proceed_further = 1,
1122+
committedStatus = 2,
1123+
candidateType = 1,
1124+
reserved = 28,
1125+
};
1126+
1127+
// This union is defined for futures use.
1128+
// It will replace writing the RayQuery Return Value
1129+
// to the MemHit in ShadowMemory.
1130+
union
1131+
{
1132+
uint32_t rayQueryReturnDWord;
1133+
1134+
struct
1135+
{
1136+
uint32_t PROCEED_FURTHER : (uint32_t)Bits::proceed_further; // This bit when set indicates that traversal is not complete i.e. all candidates have not been searched yet.
1137+
COMMITTED_STATUS committedStatus : (uint32_t)Bits::committedStatus; // This bit field provides the Committed Hit's Status / Type.
1138+
CANDIDATE_TYPE candidateType : (uint32_t)Bits::candidateType; // This bit indicates the candidate type for a potential hit.
1139+
uint32_t reserved : (uint32_t)Bits::reserved; // Reserved
1140+
};
1141+
};
1142+
};
11171143

11181144
} // namespace RTStackFormat
11191145

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4429,6 +4429,9 @@ namespace IGC
44294429
// API check.
44304430
bool enableForRetey = m_program->m_DriverInfo->enableVISAPreRASchedulerForRetry() ||
44314431
context->m_retryManager.AllowVISAPreRAScheduler();
4432+
// PreRA scheduler runs always when VRT is enabled
4433+
enableForRetey |= m_program->m_Platform->supportsVRT() && m_program->m_DriverInfo->supportsVRT() &&
4434+
(context->getModuleMetaData()->compOpt.EnableVRT || IGC_IS_FLAG_ENABLED(EnableVRT));
44324435

44334436
if (IGC_IS_FLAG_ENABLED(EnableVISAPreSched) &&
44344437
m_program->m_DriverInfo->enableVISAPreRAScheduler() &&
@@ -4814,6 +4817,10 @@ namespace IGC
48144817
{
48154818
SaveOption(vISA_TotalGRFNum, NumGRFSetting);
48164819
}
4820+
else if (m_program->getNumGRFPerThread() > 0)
4821+
{
4822+
SaveOption(vISA_TotalGRFNum, m_program->getNumGRFPerThread());
4823+
}
48174824

48184825
if (context->getModuleMetaData()->compOpt.WaEnableALTModeVisaWA)
48194826
{
@@ -4897,6 +4904,7 @@ namespace IGC
48974904
} else if (m_program->m_Platform->supportsAutoGRFSelection() &&
48984905
context->m_DriverInfo.supportsAutoGRFSelection() &&
48994906
IGC_IS_FLAG_ENABLED(ForceSupportsAutoGRFSelection)
4907+
|| m_program->m_Platform->supportsVRT() && m_program->m_DriverInfo->supportsVRT() && IGC_IS_FLAG_ENABLED(EnableVRT)
49004908
) {
49014909
// When user hasn't specified number of threads, we can rely on
49024910
// compiler heuristics
@@ -5383,6 +5391,10 @@ namespace IGC
53835391
SaveOption(vISA_EnableProgrammableOffsetsMessageBitInHeader, true);
53845392
}
53855393

5394+
if (uint32_t Val = IGC_GET_FLAG_VALUE(EnableScalarPipe))
5395+
{
5396+
SaveOption(vISA_ScalarPipe, Val);
5397+
}
53865398
if (IGC_IS_FLAG_ENABLED(NewSpillCostFunction) ||
53875399
context->getCompilerOption().NewSpillCostFunction ||
53885400
( context->type == ShaderType::COMPUTE_SHADER &&
@@ -9452,7 +9464,7 @@ namespace IGC
94529464
CVariable* pU,
94539465
CVariable* pV,
94549466
CVariable* pR,
9455-
CVariable* pLOD,
9467+
CVariable* pLODorSampleIdx,
94569468
CVariable* pSrcDst,
94579469
unsigned elemSize, // in bits
94589470
unsigned numElems,
@@ -9465,7 +9477,7 @@ namespace IGC
94659477
VISA_RawOpnd* pSrc = nullptr;
94669478
VISA_RawOpnd* pDst = nullptr;
94679479

9468-
if (subOp == LSC_STORE_QUAD)
9480+
if (subOp == LSC_STORE_QUAD || subOp == LSC_STORE_QUAD_MSRT)
94699481
{
94709482
pSrc = GetRawSource(pSrcDst, 0);
94719483
}
@@ -9479,7 +9491,7 @@ namespace IGC
94799491
VISA_RawOpnd* pROffset = GetRawSource(pR, m_encoderState.m_srcOperand[2].subVar * getGRFSize());
94809492

94819493
// LoD or whatever indexing is being used
9482-
VISA_RawOpnd* pIndex = GetRawSource(pLOD, m_encoderState.m_srcOperand[3].subVar * getGRFSize());
9494+
VISA_RawOpnd* pIndex = GetRawSource(pLODorSampleIdx, m_encoderState.m_srcOperand[3].subVar * getGRFSize());
94839495

94849496
VISA_PredOpnd* predOpnd = GetFlagOperand(m_encoderState.m_flag);
94859497
IGC_ASSERT(m_encoderState.m_dstOperand.subVar == 0);

‎IGC/Compiler/CISACodeGen/CISABuilder.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -322,7 +322,7 @@ namespace IGC
322322
void LSC_TypedReadWrite(
323323
LSC_OP subOp, ResourceDescriptor* resource,
324324
CVariable* pU, CVariable* pV, CVariable* pR,
325-
CVariable* pLOD,
325+
CVariable* pLODorSampleIdx,
326326
CVariable* pSrcDst,
327327
unsigned elemSize, unsigned numElems,
328328
LSC_ADDR_SIZE addr_size, int chMask,

‎IGC/Compiler/CISACodeGen/Platform.hpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1523,6 +1523,13 @@ bool isSWSubTriangleOpacityCullingEmulationEnabled() const
15231523
IGC_IS_FLAG_DISABLED(DisableSWSubTriangleOpacityCullingEmulation));
15241524
}
15251525

1526+
bool isRayQueryReturnOptimizationEnabled() const
1527+
{
1528+
return (isCoreChildOf(IGFX_XE2_HPG_CORE) &&
1529+
!getWATable().Wa_14018117913 &&
1530+
IGC_IS_FLAG_DISABLED(DisableRayQueryReturnOptimization));
1531+
}
1532+
15261533
// ***** Below go accessor methods for testing WA data from WA_TABLE *****
15271534

15281535
bool WaDoNotPushConstantsForAllPulledGSTopologies() const

‎IGC/Compiler/CMakeLists.txt

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,8 @@ set(IGC_BUILD__SRC__Compiler
113113
"${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/igt_12_74_hw_wa.c"
114114
"${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/igt_20_01_hw_wa.c"
115115
"${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/igt_20_04_hw_wa.c"
116+
"${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/igt_30_00_hw_wa.c"
117+
"${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/igt_30_01_hw_wa.c"
116118
"${CMAKE_CURRENT_SOURCE_DIR}/SamplerPerfOptPass.cpp"
117119
"${CMAKE_CURRENT_SOURCE_DIR}/TranslateToProgrammableOffsetsPass.cpp"
118120
${IGC_BUILD__SRC__Compiler_CISACodeGen}

‎IGC/Compiler/igc_workaround_linux.cpp

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,23 @@ namespace IGC
205205
}
206206
break;
207207
}
208+
case IGFX_XE3_CORE:
209+
{
210+
stWaInitParam.usWaIpShift = WA_BIT_GT;
211+
switch (GFX_GET_GMD_RELEASE_VERSION_RENDER(platform->getPlatformInfo()))
212+
{
213+
case GFX_GMD_ARCH_30_RELEASE_XE3_LPG_3000:
214+
InitGt_30_00HwWaTable(&waTable, pSkuFeatureTable, &stWaInitParam);
215+
break;
216+
case GFX_GMD_ARCH_30_RELEASE_XE3_LPG_3001:
217+
InitGt_30_01HwWaTable(&waTable, pSkuFeatureTable, &stWaInitParam);
218+
break;
219+
default:
220+
IGC_ASSERT_MESSAGE(0, "unknown IP");
221+
break;
222+
}
223+
break;
224+
}
208225
default:
209226
// SKUs with no GT IP. So do nothing.
210227
break;

‎IGC/common/igc_flags.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1004,6 +1004,7 @@ DECLARE_IGC_GROUP("Raytracing Options")
10041004
DECLARE_IGC_REGKEY(bool, ForceGenMemDefaultCacheCtrl, false, "If enabled, no message specific cache ctrls are set on memory outside of RTStack, SWStack, and SWHotZone", true)
10051005
DECLARE_IGC_REGKEY(bool, EnableRTPrintf, false, "Enable printf for ray tracing.", true)
10061006
DECLARE_IGC_REGKEY(DWORD, PrintfBufferSize, 0, "Set printf buffer size. Unit: KB.", true)
1007+
DECLARE_IGC_REGKEY(bool, DisableRayQueryReturnOptimization, false, "RayQuery Return Optimization", true)
10071008
DECLARE_IGC_REGKEY(bool, DisableRayQueryDynamicRayManagementMechanism, false, "Dynamic ray management mechanism for Synchronous Ray Tracing", true)
10081009
DECLARE_IGC_REGKEY(bool, DisableRayQueryDynamicRayManagementMechanismForExternalFunctionsCalls, false, "Disable dynamic ray management mechanism for shaders with external functions calls", true)
10091010
DECLARE_IGC_REGKEY(bool, DisableRayQueryDynamicRayManagementMechanismForBarriers, false, "Disable dynamic ray management mechanism for shaders with barriers", true)

‎inc/common/igfxfmid.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,9 @@ typedef struct GFX_GMD_ID_DEF
156156
#define GFX_GMD_ARCH_20_RELEASE_XE2_HPG_X2 (1)
157157
#define GFX_GMD_ARCH_20_RELEASE_XE2_LPG (4)
158158

159+
#define GFX_GMD_ARCH_30_RELEASE_XE3_LPG_3000 (0)
160+
#define GFX_GMD_ARCH_30_RELEASE_XE3_LPG_3001 (1)
161+
159162
#define GFX_GET_GMD_RELEASE_VERSION_RENDER(p) ((p).sRenderBlockID.GmdID.GMDRelease)
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#define GFX_GET_GMD_RELEASE_VERSION_DISPLAY(p) ((p).sDisplayBlockID.GmdID.GMDRelease)
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#define GFX_GET_GMD_RELEASE_VERSION_MEDIA(p) ((p).sMediaBlockID.GmdID.GMDRelease)

‎inc/common/sku_wa.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -353,6 +353,15 @@ enum WA_BUG_TYPE
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#define WA_BUG_PERF_IMPACT(f) f
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#define WA_BUG_PERF_IMPACT_UNKNOWN -1
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356+
enum WA_BIT_TYPE
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{
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WA_BIT_LEGACY = 0,
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WA_BIT_GT = 1,
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WA_BIT_MEDIA = 2,
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WA_BIT_DISPLAY = 3,
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WA_BIT_MAX = WA_BIT_DISPLAY,
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};
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enum WA_COMPONENT
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{
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WA_COMPONENT_UNKNOWN = 0,

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