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[SYCL] [FPGA] Create DSP control E2E emulator test #591
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/verify with intel/llvm#5035 |
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/verify with intel/llvm#5035 |
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Create header file that provides user API for FPGA DSP control feature.
Related links:
SPIR-V spec: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fpga_dsp_control.asciidoc
SPIR-V implementation:
[SPIRV] New FPGA function attribute for DSP control KhronosGroup/SPIRV-LLVM-Translator#1046
Test: intel/llvm-test-suite#591
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Note that the new test Basic/fpga_tests/fpga_dsp_control.cpp passed in Jenkins/llvm-test-suite: http://llvm-ci-test2.intel.com:8080/blue/organizations/jenkins/SYCL_CI%2Fintel%2FLin%2FLLVM_Test_Suite_CUDA/detail/LLVM_Test_Suite_CUDA/80/pipeline/#step-239-log-156. |
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/verify with intel/llvm#5035 |
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Both fpga_dsp_control.cpp and fpga_lsu.cpp passed compile and run in the latest Jenkins/llvm-test-suite. |
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Create E2E emulator test for newly added DSP control header.
The corresponding SYCL PR: intel/llvm#5035