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[SYCL] Remove broken atomic_memory_order* tests #783
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I believe you are right. I must have been confused in the moment because these are fundamentally wrong. That said, I am not sure I am happy just removing these tests and leaving the functionality untested. Do you have an idea on how to correctly test the functionality? Also, I am not sure I understand the motivation for fully removing some of the tests here while just removing the contents of others? |
Atomic loads and stores have other tests.
If you mean testing for correct memory orders - yes that is possible, just a lot of work because we would probably need a different test for each operation. If we are doing it, we should test all operations, not just loads and stores. Also, as with most tests for atomics, they would not be guaranteed to fail if run with incorrect implementation.
All tests that actually run atomics are removed. The only thing I left in is the assert that if a device supports acquire release order it should also support acquire and release. |
Yes, I meant memory ordering specifically. I am not expecting full covered - that's what we have the CTS for - but just some small example tests showing that devices that claim to support
Of course. We just need something that could show us potential failures so we can fix them early.
Then I think we should keep SYCL/AtomicRef/atomic_memory_order_seq_cst.cpp too. |
I am not sure such a test for just one operation makes much sense. Whether a device supports certain memory order is usually documented somewhere. Such a test would in my opinion mostly catch errors connected to whether the implementation of atomic operation uses the correct order.
What in this test would you like to keep? I don't see any assertion that if a device supports sequentially consistent order it should also support some other order. |
Exactly, and I think that's a good test to have. If it states that it supports the memory order it should also use it correctly when requested. If it doesn't then that's a bug that should be found and fixed.
Apologies, I misunderstood what you meant. |
I agree. What I am trying to argue is that if we are going into that, we should do such tests for all atomic operations. |
I don't disagree, but for a start it would be nice to just have a basic case for the sake of not leaving it untested. |
I think it makes sense to create an issue to cover this functionality properly. |
@steffenlarsen, these tests fail in pre-commit, so it would be great to fix them ASAP. Are you okay to commit it "as is" and write new tests in a separate PR? |
@steffenlarsen, ping. |
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Sorry. Yes, I am okay with this as-is.
…e#783) Removes `atomic_memory_order*` tests, which are broken. They are using the pattern: ``` auto ld = aar.load(); ld += 1; aar.store(ld); ``` and checking if the whole sequence of operations is atomic. Which it is not - only each of the operations (load/store) on its own is atomic. Before intel#4853 was merged no backend supported acquire release or sequentially consistent memory orders, so these tests were never run before. This issue was first discussed here: intel#4853 (comment)
Removes
atomic_memory_order*
tests, which are broken. They are using the pattern:and checking if the whole sequence of operations is atomic. Which it is not - only each of the operations (load/store) on its own is atomic.
Before intel/llvm#4853 was merged no backend supported acquire release or sequentially consistent memory orders, so these tests were never run before.
This issue was first discussed here: intel/llvm#4853 (comment)
@bader @steffenlarsen