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[SYCL][ESIMD] Add tests for dpas API #866
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//==--------------- dpas_test1.cpp - DPC++ ESIMD on-device test -----------==// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// REQUIRES: gpu-intel-dg2 | ||
// UNSUPPORTED: cuda || hip | ||
// RUN: %clangxx -fsycl %s -o %t.out | ||
// RUN: %GPU_RUN_PLACEHOLDER %t.out | ||
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#include "../esimd_test_utils.hpp" | ||
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#include <CL/sycl.hpp> | ||
#include <iostream> | ||
#include <sycl/ext/intel/experimental/esimd.hpp> | ||
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using namespace cl::sycl; | ||
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int main(void) { | ||
constexpr unsigned Size = 64; | ||
constexpr unsigned VL = 16; | ||
constexpr unsigned GroupSize = 1; | ||
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queue q(esimd_test::ESIMDSelector{}, esimd_test::createExceptionHandler()); | ||
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auto dev = q.get_device(); | ||
std::cout << "Running on " << dev.get_info<info::device::name>() << "\n"; | ||
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int *C = malloc_shared<int>(Size, q); | ||
memset(C, 0, Size * sizeof(int)); | ||
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// We need that many task groups | ||
range<1> GroupRange{GroupSize}; | ||
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// We need that many tasks in each group | ||
range<1> TaskRange{GroupSize}; | ||
nd_range<1> Range(GroupRange, TaskRange); | ||
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q.submit([&](handler &cgh) { | ||
cgh.parallel_for<class Test>(Range, [=](nd_item<1> ndi) SYCL_ESIMD_KERNEL { | ||
using namespace sycl::ext::intel::experimental::esimd; | ||
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simd<char, Size * 2> va(0); | ||
auto ma = va.bit_cast_view<char, 8, 16>(); | ||
ma.select<2, 1, 4, 4>(0, 0) = 4; | ||
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simd<char, 8 * 16> vb(0); | ||
auto mb = vb.bit_cast_view<char, 8, 16>(); | ||
mb.select<8, 1, 1, 1>(0, 0) = 4; | ||
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simd<int, Size> vc(0); | ||
vc = | ||
dpas<argument_type::S2, argument_type::S2, 8, 8, int, int, int, Size, | ||
32, 32>(vc, ma.bit_cast_view<int>(), mb.bit_cast_view<int>()); | ||
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for (int i = 0; i < Size; i += VL) { | ||
simd<int, VL> output = vc.select<VL, 1>(i); | ||
output.copy_to(C + i); | ||
} | ||
}); | ||
}).wait(); | ||
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int err_cnt = 0; | ||
for (unsigned i = 0; i < Size && err_cnt < 10; ++i) | ||
if (C[i] != 1) { | ||
err_cnt++; | ||
std::cerr << "Failed at index " << i << ", " << C[i] << " != 1\n"; | ||
} | ||
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free(C, q); | ||
std::cout << (err_cnt > 0 ? "FAILED\n" : "Passed\n"); | ||
return err_cnt > 0 ? 1 : 0; | ||
} |
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//==---------------- dpas_test2.cpp - DPC++ ESIMD on-device test ----------==// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// REQUIRES: gpu-intel-pvc | ||
// UNSUPPORTED: cuda || hip | ||
// RUN: %clangxx -fsycl -DESIMD_XE_HPC %s -o %t.out | ||
// RUN: %GPU_RUN_PLACEHOLDER %t.out | ||
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#include "../esimd_test_utils.hpp" | ||
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#include <CL/sycl.hpp> | ||
#include <iostream> | ||
#include <sycl/ext/intel/experimental/esimd.hpp> | ||
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using namespace cl::sycl; | ||
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int main(void) { | ||
constexpr unsigned Size = 128; | ||
constexpr unsigned VL = 16; | ||
constexpr unsigned GroupSize = 1; | ||
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queue q(esimd_test::ESIMDSelector{}, esimd_test::createExceptionHandler()); | ||
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auto dev = q.get_device(); | ||
std::cout << "Running on " << dev.get_info<info::device::name>() << "\n"; | ||
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int *C = malloc_shared<int>(Size, q); | ||
memset(C, 0, Size * sizeof(int)); | ||
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// We need that many task groups | ||
range<1> GroupRange{GroupSize}; | ||
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// We need that many tasks in each group | ||
range<1> TaskRange{GroupSize}; | ||
nd_range<1> Range(GroupRange, TaskRange); | ||
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q.submit([&](handler &cgh) { | ||
cgh.parallel_for<class Test>(Range, [=](nd_item<1> ndi) SYCL_ESIMD_KERNEL { | ||
using namespace sycl::ext::intel::experimental::esimd; | ||
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simd<char, Size * 2> va(0); | ||
auto ma = va.bit_cast_view<char, 8, 32>(); | ||
ma.select<2, 1, 8, 4>(0, 0) = 4; | ||
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simd<char, Size> vb(0); | ||
auto mb = vb.bit_cast_view<char, 8, 16>(); | ||
mb.select<8, 1, 1, 1>(0, 0) = 4; | ||
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simd<int, Size> vc(0); | ||
vc = | ||
dpas<argument_type::S2, argument_type::S2, 8, 8, int, int, int, Size, | ||
64, 32>(vc, ma.bit_cast_view<int>(), mb.bit_cast_view<int>()); | ||
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for (int i = 0; i < Size; i += VL) { | ||
simd<int, VL> output = vc.select<VL, 1>(i); | ||
output.copy_to(C + i); | ||
} | ||
}); | ||
}).wait(); | ||
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int err_cnt = 0; | ||
for (unsigned i = 0; i < Size && err_cnt < 10; ++i) | ||
if (C[i] != 1) { | ||
err_cnt++; | ||
std::cerr << "Failed at index " << i << ", " << C[i] << " != 1\n"; | ||
} | ||
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free(C, q); | ||
std::cout << (err_cnt > 0 ? "FAILED\n" : "Passed\n"); | ||
return err_cnt > 0 ? 1 : 0; | ||
} |
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//==------------- dpasw_test.cpp - DPC++ ESIMD on-device test -------------==// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// REQUIRES: gpu-intel-dg2 | ||
// UNSUPPORTED: cuda || hip | ||
// RUN: %clangxx -fsycl %s -o %t.out | ||
// RUN: %GPU_RUN_PLACEHOLDER %t.out | ||
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#include "../esimd_test_utils.hpp" | ||
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#include <CL/sycl.hpp> | ||
#include <iostream> | ||
#include <sycl/ext/intel/experimental/esimd.hpp> | ||
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using namespace cl::sycl; | ||
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int main(void) { | ||
constexpr unsigned Size = 64; | ||
constexpr unsigned VL = 16; | ||
constexpr unsigned GroupSize = 2; | ||
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queue q(esimd_test::ESIMDSelector{}, esimd_test::createExceptionHandler()); | ||
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auto dev = q.get_device(); | ||
std::cout << "Running on " << dev.get_info<info::device::name>() << "\n"; | ||
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int *C = malloc_shared<int>(Size, q); | ||
memset(C, 0, Size * sizeof(int)); | ||
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// We need that many task groups | ||
range<1> GroupRange{GroupSize}; | ||
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// We need that many tasks in each group | ||
range<1> TaskRange{GroupSize}; | ||
nd_range<1> Range(GroupRange, TaskRange); | ||
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q.submit([&](handler &cgh) { | ||
cgh.parallel_for<class Test>(Range, [=](nd_item<1> ndi) SYCL_ESIMD_KERNEL { | ||
using namespace sycl::ext::intel::experimental::esimd; | ||
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simd<char, Size * 2> va(0); | ||
auto ma = va.bit_cast_view<char, 8, 16>(); | ||
ma.select<2, 1, 4, 4>(0, 0) = 4; | ||
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simd<char, 8 * 8> vb(0); | ||
auto mb = vb.bit_cast_view<char, 8, 8>(); | ||
mb.select<4, 2, 1, 1>(0, 0) = 4; | ||
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simd<int, Size> vc(0); | ||
vc = dpasw<argument_type::S2, argument_type::S2, 8, 8, int, int, int, | ||
Size, 32, 16>(vc, ma.bit_cast_view<int>(), | ||
mb.bit_cast_view<int>()); | ||
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for (int i = 0; i < Size; i += VL) { | ||
simd<int, VL> output = vc.select<VL, 1>(i); | ||
output.copy_to(C + i); | ||
} | ||
}); | ||
}).wait(); | ||
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int err_cnt = 0; | ||
for (unsigned i = 0; i < Size && err_cnt < 10; ++i) | ||
if (C[i] != 1) { | ||
err_cnt++; | ||
std::cerr << "Failed at index " << i << ", " << C[i] << " != 1\n"; | ||
} | ||
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free(C, q); | ||
std::cout << (err_cnt > 0 ? "FAILED\n" : "Passed\n"); | ||
return err_cnt > 0 ? 1 : 0; | ||
} |
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As we talked, there are no DG2 or PVC machines in CI, so this will disable even compilation. Are you going to address this in a separate commit?
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No, per discussion with CI folks, compilation tests are supposed to be checked in to compiler tests, while llvm-test-suite contains executable tests. So, it looks like CI would need to be extended to have these machines.
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I see, thanks