@@ -205,10 +205,11 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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return ReturnValue (Atomic64);
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}
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case UR_DEVICE_INFO_ATOMIC_MEMORY_ORDER_CAPABILITIES: {
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- uint64_t Capabilities = UR_MEMORY_ORDER_CAPABILITY_FLAG_RELAXED |
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- UR_MEMORY_ORDER_CAPABILITY_FLAG_ACQUIRE |
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- UR_MEMORY_ORDER_CAPABILITY_FLAG_RELEASE |
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- UR_MEMORY_ORDER_CAPABILITY_FLAG_ACQ_REL;
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+ ur_memory_order_capability_flags_t Capabilities =
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+ UR_MEMORY_ORDER_CAPABILITY_FLAG_RELAXED |
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+ UR_MEMORY_ORDER_CAPABILITY_FLAG_ACQUIRE |
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+ UR_MEMORY_ORDER_CAPABILITY_FLAG_RELEASE |
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+ UR_MEMORY_ORDER_CAPABILITY_FLAG_ACQ_REL;
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return ReturnValue (Capabilities);
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}
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case UR_DEVICE_INFO_ATOMIC_MEMORY_SCOPE_CAPABILITIES: {
@@ -314,7 +315,7 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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" runtime." );
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}
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- return ReturnValue (uint32_t { Enabled} );
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+ return ReturnValue (Enabled);
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}
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case UR_DEVICE_INFO_MAX_READ_IMAGE_ARGS: {
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// This call doesn't match to CUDA as it doesn't have images, but instead
@@ -472,7 +473,7 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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}
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case UR_DEVICE_INFO_SINGLE_FP_CONFIG: {
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// TODO: is this config consistent across all NVIDIA GPUs?
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- uint64_t Config =
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+ ur_device_fp_capability_flags_t Config =
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UR_DEVICE_FP_CAPABILITY_FLAG_DENORM |
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UR_DEVICE_FP_CAPABILITY_FLAG_INF_NAN |
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UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_NEAREST |
@@ -484,12 +485,13 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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}
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case UR_DEVICE_INFO_DOUBLE_FP_CONFIG: {
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// TODO: is this config consistent across all NVIDIA GPUs?
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- uint64_t Config = UR_DEVICE_FP_CAPABILITY_FLAG_DENORM |
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- UR_DEVICE_FP_CAPABILITY_FLAG_INF_NAN |
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- UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_NEAREST |
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- UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_ZERO |
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- UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_INF |
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- UR_DEVICE_FP_CAPABILITY_FLAG_FMA;
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+ ur_device_fp_capability_flags_t Config =
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+ UR_DEVICE_FP_CAPABILITY_FLAG_DENORM |
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+ UR_DEVICE_FP_CAPABILITY_FLAG_INF_NAN |
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+ UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_NEAREST |
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+ UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_ZERO |
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+ UR_DEVICE_FP_CAPABILITY_FLAG_ROUND_TO_INF |
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+ UR_DEVICE_FP_CAPABILITY_FLAG_FMA;
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return ReturnValue (Config);
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}
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case UR_DEVICE_INFO_GLOBAL_MEM_CACHE_TYPE: {
@@ -599,13 +601,13 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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UR_QUEUE_FLAG_PROFILING_ENABLE));
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case UR_DEVICE_INFO_QUEUE_ON_DEVICE_PROPERTIES: {
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// The mandated minimum capability:
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- uint64_t Capability = UR_QUEUE_FLAG_PROFILING_ENABLE |
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- UR_QUEUE_FLAG_OUT_OF_ORDER_EXEC_MODE_ENABLE;
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+ ur_queue_flags_t Capability = UR_QUEUE_FLAG_PROFILING_ENABLE |
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+ UR_QUEUE_FLAG_OUT_OF_ORDER_EXEC_MODE_ENABLE;
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return ReturnValue (Capability);
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}
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case UR_DEVICE_INFO_QUEUE_ON_HOST_PROPERTIES: {
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// The mandated minimum capability:
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- uint64_t Capability = UR_QUEUE_FLAG_PROFILING_ENABLE;
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+ ur_queue_flags_t Capability = UR_QUEUE_FLAG_PROFILING_ENABLE;
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return ReturnValue (Capability);
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}
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case UR_DEVICE_INFO_BUILT_IN_KERNELS: {
@@ -1015,7 +1017,7 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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hDevice->get ()) == CUDA_SUCCESS);
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}
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- uint64_t MemoryBandwidth = uint64_t ( MemoryClockKHz) * MemoryBusWidth * 250 ;
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+ uint32_t MemoryBandwidth = MemoryClockKHz * MemoryBusWidth * 250 ;
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return ReturnValue (MemoryBandwidth);
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}
@@ -1075,13 +1077,14 @@ UR_APIEXPORT ur_result_t UR_APICALL urDeviceGetInfo(ur_device_handle_t hDevice,
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case UR_DEVICE_INFO_KERNEL_SET_SPECIALIZATION_CONSTANTS:
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return ReturnValue (false );
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// TODO: Investigate if this information is available on CUDA.
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+ case UR_DEVICE_INFO_MAX_READ_WRITE_IMAGE_ARGS:
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case UR_DEVICE_INFO_GPU_EU_COUNT:
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case UR_DEVICE_INFO_GPU_EU_SIMD_WIDTH:
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case UR_DEVICE_INFO_GPU_EU_SLICES:
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case UR_DEVICE_INFO_GPU_SUBSLICES_PER_SLICE:
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case UR_DEVICE_INFO_GPU_EU_COUNT_PER_SUBSLICE:
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case UR_DEVICE_INFO_GPU_HW_THREADS_PER_EU:
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- return UR_RESULT_ERROR_INVALID_ENUMERATION ;
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+ return UR_RESULT_ERROR_UNSUPPORTED_ENUMERATION ;
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default :
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break ;
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