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Signed-off-by: Viktoria Maksimova <[email protected]>
1 parent 467f5c2 commit 1fa323d

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3 files changed

+239
-219
lines changed

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+239
-219
lines changed

‎llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -790,8 +790,7 @@ void SPIRVToLLVM::setLLVMLoopMetadata(const LoopInstType *LM,
790790
Metadata.push_back(llvm::MDNode::get(
791791
*Context,
792792
getMetadataFromNameAndParameter("llvm.loop.intel.pipelining.enable",
793-
LoopControlParameters[NumParam])));
794-
++NumParam;
793+
LoopControlParameters[NumParam++])));
795794
assert(NumParam <= LoopControlParameters.size() &&
796795
"Missing loop control parameter!");
797796
}
@@ -800,8 +799,7 @@ void SPIRVToLLVM::setLLVMLoopMetadata(const LoopInstType *LM,
800799
Metadata.push_back(llvm::MDNode::get(
801800
*Context,
802801
getMetadataFromNameAndParameter("llvm.loop.coalesce.count",
803-
LoopControlParameters[NumParam])));
804-
++NumParam;
802+
LoopControlParameters[NumParam++])));
805803
} else { // If LoopCoalesce has no parameters
806804
Metadata.push_back(llvm::MDNode::get(
807805
*Context, getMetadataFromName("llvm.loop.coalesce.enable")));
@@ -813,17 +811,15 @@ void SPIRVToLLVM::setLLVMLoopMetadata(const LoopInstType *LM,
813811
Metadata.push_back(llvm::MDNode::get(
814812
*Context,
815813
getMetadataFromNameAndParameter("llvm.loop.max_interleaving.count",
816-
LoopControlParameters[NumParam])));
817-
++NumParam;
814+
LoopControlParameters[NumParam++])));
818815
assert(NumParam <= LoopControlParameters.size() &&
819816
"Missing loop control parameter!");
820817
}
821818
if (LC & LoopControlSpeculatedIterationsINTEL) {
822819
Metadata.push_back(llvm::MDNode::get(
823820
*Context, getMetadataFromNameAndParameter(
824821
"llvm.loop.intel.speculated.iterations.count",
825-
LoopControlParameters[NumParam])));
826-
++NumParam;
822+
LoopControlParameters[NumParam++])));
827823
assert(NumParam <= LoopControlParameters.size() &&
828824
"Missing loop control parameter!");
829825
}

‎llvm-spirv/test/transcoding/FPGALoopAttr.ll

Lines changed: 0 additions & 211 deletions
Original file line numberDiff line numberDiff line change
@@ -168,175 +168,6 @@ for.end36: ; preds = %for.cond29
168168
ret void
169169
}
170170

171-
; Function Attrs: noinline nounwind optnone
172-
define spir_func void @loop_pipelining() #0 {
173-
entry:
174-
%a = alloca [10 x i32], align 4
175-
%i = alloca i32, align 4
176-
store i32 0, i32* %i, align 4
177-
br label %for.cond
178-
179-
; Per SPIR-V spec, LoopControlPipelineEnableINTEL = 0x80000 (524288)
180-
; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 524288 1
181-
; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
182-
; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 524288 1
183-
for.cond: ; preds = %for.inc, %entry
184-
%0 = load i32, i32* %i, align 4
185-
%cmp = icmp ne i32 %0, 10
186-
br i1 %cmp, label %for.body, label %for.end
187-
188-
for.body: ; preds = %for.cond
189-
%1 = load i32, i32* %i, align 4
190-
%idxprom = sext i32 %1 to i64
191-
%arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
192-
store i32 0, i32* %arrayidx, align 4
193-
br label %for.inc
194-
195-
for.inc: ; preds = %for.body
196-
%2 = load i32, i32* %i, align 4
197-
%inc = add nsw i32 %2, 1
198-
store i32 %inc, i32* %i, align 4
199-
br label %for.cond, !llvm.loop !12
200-
201-
for.end: ; preds = %for.cond
202-
ret void
203-
}
204-
205-
; Function Attrs: noinline nounwind optnone
206-
define spir_func void @loop_coalesce() #0 {
207-
entry:
208-
%i = alloca i32, align 4
209-
%m = alloca i32, align 4
210-
store i32 0, i32* %i, align 4
211-
store i32 42, i32* %m, align 4
212-
br label %while.cond
213-
214-
; Per SPIR-V spec, LoopControlLoopCoalesceINTEL = 0x100000 (1048576)
215-
; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576 4
216-
; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
217-
; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576 4
218-
while.cond: ; preds = %if.end, %if.then, %entry
219-
%0 = load i32, i32* %i, align 4
220-
%1 = load i32, i32* %m, align 4
221-
%cmp = icmp slt i32 %0, %1
222-
br i1 %cmp, label %while.body, label %while.end
223-
224-
while.body: ; preds = %while.cond
225-
%2 = load i32, i32* %i, align 4
226-
%rem = srem i32 %2, 2
227-
%tobool = icmp ne i32 %rem, 0
228-
br i1 %tobool, label %if.then, label %if.end
229-
230-
if.then: ; preds = %while.body
231-
%3 = load i32, i32* %i, align 4
232-
%inc = add nsw i32 %3, 1
233-
store i32 %inc, i32* %i, align 4
234-
br label %while.cond, !llvm.loop !14
235-
236-
if.end: ; preds = %while.body
237-
br label %while.cond, !llvm.loop !14
238-
239-
while.end: ; preds = %while.cond
240-
store i32 0, i32* %i, align 4
241-
br label %while.cond1
242-
243-
; Per SPIR-V spec, LoopControlLoopCoalesceINTEL = 0x100000 (1048576)
244-
; CHECK-SPIRV: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576
245-
; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
246-
; CHECK-SPIRV-NEGATIVE-NOT: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576
247-
while.cond1: ; preds = %if.end8, %if.then6, %while.end
248-
%4 = load i32, i32* %i, align 4
249-
%5 = load i32, i32* %m, align 4
250-
%cmp2 = icmp slt i32 %4, %5
251-
br i1 %cmp2, label %while.body3, label %while.end9
252-
253-
while.body3: ; preds = %while.cond1
254-
%6 = load i32, i32* %i, align 4
255-
%rem4 = srem i32 %6, 3
256-
%tobool5 = icmp ne i32 %rem4, 0
257-
br i1 %tobool5, label %if.then6, label %if.end8
258-
259-
if.then6: ; preds = %while.body3
260-
%7 = load i32, i32* %i, align 4
261-
%inc7 = add nsw i32 %7, 1
262-
store i32 %inc7, i32* %i, align 4
263-
br label %while.cond1, !llvm.loop !16
264-
265-
if.end8: ; preds = %while.body3
266-
br label %while.cond1, !llvm.loop !16
267-
268-
while.end9: ; preds = %while.cond1
269-
ret void
270-
}
271-
272-
; Function Attrs: noinline nounwind optnone
273-
define spir_func void @max_interleaving() #0 {
274-
entry:
275-
%a = alloca [10 x i32], align 4
276-
%i = alloca i32, align 4
277-
store i32 0, i32* %i, align 4
278-
br label %for.cond
279-
280-
; Per SPIR-V spec, LoopControlMaxInterleavingINTEL = 0x200000 (2097152)
281-
; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 2097152 3
282-
; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
283-
; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 2097152 3
284-
for.cond: ; preds = %for.inc, %entry
285-
%0 = load i32, i32* %i, align 4
286-
%cmp = icmp ne i32 %0, 10
287-
br i1 %cmp, label %for.body, label %for.end
288-
289-
for.body: ; preds = %for.cond
290-
%1 = load i32, i32* %i, align 4
291-
%idxprom = sext i32 %1 to i64
292-
%arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
293-
store i32 0, i32* %arrayidx, align 4
294-
br label %for.inc
295-
296-
for.inc: ; preds = %for.body
297-
%2 = load i32, i32* %i, align 4
298-
%inc = add nsw i32 %2, 1
299-
store i32 %inc, i32* %i, align 4
300-
br label %for.cond, !llvm.loop !18
301-
302-
for.end: ; preds = %for.cond
303-
ret void
304-
}
305-
306-
; Function Attrs: noinline nounwind optnone
307-
define spir_func void @speculated_iterations() #0 {
308-
entry:
309-
%a = alloca [10 x i32], align 4
310-
%i = alloca i32, align 4
311-
store i32 0, i32* %i, align 4
312-
br label %for.cond
313-
314-
; Per SPIR-V spec, LoopControlSpeculatedIterationsINTEL = 0x400000 (4194304)
315-
; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 4194304 4
316-
; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
317-
; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 4194304 4
318-
for.cond: ; preds = %for.inc, %entry
319-
%0 = load i32, i32* %i, align 4
320-
%cmp = icmp ne i32 %0, 10
321-
br i1 %cmp, label %for.body, label %for.end
322-
323-
for.body: ; preds = %for.cond
324-
%1 = load i32, i32* %i, align 4
325-
%idxprom = sext i32 %1 to i64
326-
%arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
327-
store i32 0, i32* %arrayidx, align 4
328-
br label %for.inc
329-
330-
for.inc: ; preds = %for.body
331-
%2 = load i32, i32* %i, align 4
332-
%inc = add nsw i32 %2, 1
333-
store i32 %inc, i32* %i, align 4
334-
br label %for.cond, !llvm.loop !20
335-
336-
for.end: ; preds = %for.cond
337-
ret void
338-
}
339-
340171
attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
341172

342173
!llvm.module.flags = !{!0}
@@ -355,38 +186,18 @@ attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide
355186
!9 = distinct !{!9, !10}
356187
!10 = !{!"llvm.loop.max_concurrency.count", i32 2}
357188
!11 = distinct !{!11, !8, !10}
358-
!12 = distinct !{!12, !13}
359-
!13 = !{!"llvm.loop.intel.pipelining.enable", i32 1}
360-
!14 = distinct !{!14, !15}
361-
!15 = !{!"llvm.loop.coalesce.count", i32 4}
362-
!16 = distinct !{!16, !17}
363-
!17 = !{!"llvm.loop.coalesce.enable"}
364-
!18 = distinct !{!18, !19}
365-
!19 = !{!"llvm.loop.max_interleaving.count", i32 3}
366-
!20 = distinct !{!20, !21}
367-
!21 = !{!"llvm.loop.intel.speculated.iterations.count", i32 4}
368189

369190
; CHECK-LLVM: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_A:[0-9]+]]
370191
; CHECK-LLVM: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_B:[0-9]+]]
371192
; CHECK-LLVM: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_C:[0-9]+]]
372193
; CHECK-LLVM: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_D:[0-9]+]]
373194
; CHECK-LLVM: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_E:[0-9]+]]
374-
; CHECK-LLVM: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_F:[0-9]+]]
375-
; CHECK-LLVM: br label %while.cond{{[0-9]*}}, !llvm.loop ![[MD_G:[0-9]+]]
376-
; CHECK-LLVM: br label %while.cond{{[0-9]+}}, !llvm.loop ![[MD_H:[0-9]+]]
377-
; CHECK-LLVM: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_I:[0-9]+]]
378-
; CHECK-LLVM: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_J:[0-9]+]]
379195

380196
; CHECK-LLVM-NEGATIVE: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_A:[0-9]+]]
381197
; CHECK-LLVM-NEGATIVE: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_B:[0-9]+]]
382198
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_C:[0-9]+]]
383199
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_D:[0-9]+]]
384200
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]+}}, !llvm.loop ![[MD_E:[0-9]+]]
385-
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_F:[0-9]+]]
386-
; CHECK-LLVM-NEGATIVE-NOT: br label %while.cond{{[0-9]*}}, !llvm.loop ![[MD_G:[0-9]+]]
387-
; CHECK-LLVM-NEGATIVE-NOT: br label %while.cond{{[0-9]+}}, !llvm.loop ![[MD_H:[0-9]+]]
388-
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_I:[0-9]+]]
389-
; CHECK-LLVM-NEGATIVE-NOT: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_J:[0-9]+]]
390201

391202
; CHECK-LLVM: ![[MD_A]] = distinct !{![[MD_A]], ![[MD_ivdep_enable:[0-9]+]]}
392203
; CHECK-LLVM: ![[MD_ivdep_enable]] = !{!"llvm.loop.ivdep.enable"}
@@ -397,17 +208,6 @@ attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide
397208
; CHECK-LLVM: ![[MD_D]] = distinct !{![[MD_D]], ![[MD_max_concurrency:[0-9]+]]}
398209
; CHECK-LLVM: ![[MD_max_concurrency]] = !{!"llvm.loop.max_concurrency.count", i32 2}
399210
; CHECK-LLVM: ![[MD_E]] = distinct !{![[MD_E]], ![[MD_ii:[0-9]+]], ![[MD_max_concurrency:[0-9]+]]}
400-
; CHECK-LLVM: ![[MD_F]] = distinct !{![[MD_F]], ![[MD_pipelining:[0-9]+]]}
401-
; CHECK-LLVM: ![[MD_pipelining]] = !{!"llvm.loop.intel.pipelining.enable", i32 1}
402-
; CHECK-LLVM: ![[MD_G]] = distinct !{![[MD_G]], ![[MD_loop_coalesce_count:[0-9]+]]}
403-
; CHECK-LLVM: ![[MD_loop_coalesce_count]] = !{!"llvm.loop.coalesce.count", i32 4}
404-
; CHECK-LLVM: ![[MD_H]] = distinct !{![[MD_H]], ![[MD_loop_coalesce:[0-9]+]]}
405-
; CHECK-LLVM: ![[MD_loop_coalesce]] = !{![[MD_loop_coalesce_enable:[0-9]+]]}
406-
; CHECK-LLVM: ![[MD_loop_coalesce_enable]] = !{!"llvm.loop.coalesce.enable"}
407-
; CHECK-LLVM: ![[MD_I]] = distinct !{![[MD_I]], ![[MD_max_interleaving:[0-9]+]]}
408-
; CHECK-LLVM: ![[MD_max_interleaving]] = !{!"llvm.loop.max_interleaving.count", i32 3}
409-
; CHECK-LLVM: ![[MD_J]] = distinct !{![[MD_J]], ![[MD_spec_iterations:[0-9]+]]}
410-
; CHECK-LLVM: ![[MD_spec_iterations]] = !{!"llvm.loop.intel.speculated.iterations.count", i32 4}
411211

412212
; CHECK-LLVM-NEGATIVE: ![[MD_A]] = distinct !{![[MD_A]], ![[MD_ivdep_enable:[0-9]+]]}
413213
; CHECK-LLVM-NEGATIVE: ![[MD_ivdep_enable]] = !{!"llvm.loop.ivdep.enable"}
@@ -418,14 +218,3 @@ attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide
418218
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_D]] = distinct !{![[MD_D]], ![[MD_max_concurrency:[0-9]+]]}
419219
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_max_concurrency]] = !{!"llvm.loop.max_concurrency.count", i32 2}
420220
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_E]] = distinct !{![[MD_E]], ![[MD_ii:[0-9]+]], ![[MD_max_concurrency:[0-9]+]]}
421-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_F]] = distinct !{![[MD_F]], ![[MD_pipelining:[0-9]+]]}
422-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_pipelining]] = !{!"llvm.loop.intel.pipelining.enable", i32 1}
423-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_G]] = distinct !{![[MD_G]], ![[MD_loop_coalesce_count:[0-9]+]]}
424-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_loop_coalesce_count]] = !{!"llvm.loop.coalesce.count", i32 4}
425-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_H]] = distinct !{![[MD_H]], ![[MD_loop_coalesce:[0-9]+]]}
426-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_loop_coalesce]] = !{![[MD_loop_coalesce_enable:[0-9]+]]}
427-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_loop_coalesce_enable]] = !{!"llvm.loop.coalesce.enable"}
428-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_I]] = distinct !{![[MD_I]], ![[MD_max_interleaving:[0-9]+]]}
429-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_max_interleaving]] = !{!"llvm.loop.max_interleaving.count", i32 3}
430-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_J]] = distinct !{![[MD_J]], ![[MD_spec_iterations:[0-9]+]]}
431-
; CHECK-LLVM-NEGATIVE-NOT: ![[MD_spec_iterations]] = !{!"llvm.loop.intel.speculated.iterations.count", i32 4}

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