@@ -5995,10 +5995,17 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
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options::OPT_fno_gnu_inline_asm, true ))
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CmdArgs.push_back (" -fno-gnu-inline-asm" );
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+ bool EnableSYCLEarlyOptimizations =
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+ Args.hasFlag (options::OPT_fsycl_early_optimizations,
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+ options::OPT_fno_sycl_early_optimizations,
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+ Triple.getSubArch () != llvm::Triple::SPIRSubArch_fpga);
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+
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// Enable vectorization per default according to the optimization level
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// selected. For optimization levels that want vectorization we use the alias
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// option to simplify the hasFlag logic.
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bool EnableVec = shouldEnableVectorizerAtOLevel (Args, false );
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+ if (UseSYCLTriple && EnableSYCLEarlyOptimizations)
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+ EnableVec = false ; // But disable vectorization for SYCL device code
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OptSpecifier VectorizeAliasOption =
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EnableVec ? options::OPT_O_Group : options::OPT_fvectorize;
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if (Args.hasFlag (options::OPT_fvectorize, VectorizeAliasOption,
@@ -6007,6 +6014,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
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// -fslp-vectorize is enabled based on the optimization level selected.
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bool EnableSLPVec = shouldEnableVectorizerAtOLevel (Args, true );
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+ if (UseSYCLTriple && EnableSYCLEarlyOptimizations)
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+ EnableSLPVec = false ; // But disable vectorization for SYCL device code
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OptSpecifier SLPVectAliasOption =
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EnableSLPVec ? options::OPT_O_Group : options::OPT_fslp_vectorize;
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if (Args.hasFlag (options::OPT_fslp_vectorize, SLPVectAliasOption,
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