@@ -1370,7 +1370,7 @@ def SYCLRequiresDecomposition : InheritableAttr {
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def SYCLIntelKernelArgsRestrict : InheritableAttr {
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let Spellings = [CXX11<"intel", "kernel_args_restrict">];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Documentation = [SYCLIntelKernelArgsRestrictDocs];
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let SimpleHandler = 1;
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let SupportsNonconformingLambdaSyntax = 1;
@@ -1379,15 +1379,15 @@ def SYCLIntelKernelArgsRestrict : InheritableAttr {
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def SYCLIntelNumSimdWorkItems : InheritableAttr {
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let Spellings = [CXX11<"intel", "num_simd_work_items">];
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let Args = [ExprArgument<"Value">];
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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let Documentation = [SYCLIntelNumSimdWorkItemsAttrDocs];
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let SupportsNonconformingLambdaSyntax = 1;
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}
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def SYCLIntelUseStallEnableClusters : InheritableAttr {
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let Spellings = [CXX11<"intel","use_stall_enable_clusters">];
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- let LangOpts = [SYCLIsHost , SYCLIsDevice];
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+ let LangOpts = [SilentlyIgnoreSYCLIsHost , SYCLIsDevice];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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let Documentation = [SYCLIntelUseStallEnableClustersAttrDocs];
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let SupportsNonconformingLambdaSyntax = 1;
@@ -1396,7 +1396,7 @@ def SYCLIntelUseStallEnableClusters : InheritableAttr {
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def SYCLIntelSchedulerTargetFmaxMhz : InheritableAttr {
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let Spellings = [CXX11<"intel", "scheduler_target_fmax_mhz">];
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let Args = [ExprArgument<"Value">];
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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let Documentation = [SYCLIntelSchedulerTargetFmaxMhzAttrDocs];
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let SupportsNonconformingLambdaSyntax = 1;
@@ -1407,7 +1407,7 @@ def SYCLIntelMaxWorkGroupSize : InheritableAttr {
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let Args = [ExprArgument<"XDim">,
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ExprArgument<"YDim">,
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ExprArgument<"ZDim">];
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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let AdditionalMembers = [{
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Optional<llvm::APSInt> getXDimVal() const {
@@ -1433,7 +1433,7 @@ def SYCLIntelMaxWorkGroupSize : InheritableAttr {
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def SYCLIntelMaxGlobalWorkDim : InheritableAttr {
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let Spellings = [CXX11<"intel", "max_global_work_dim">];
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let Args = [ExprArgument<"Value">];
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Subjects = SubjectList<[Function], ErrorDiag>;
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let Documentation = [SYCLIntelMaxGlobalWorkDimAttrDocs];
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let SupportsNonconformingLambdaSyntax = 1;
@@ -2269,7 +2269,7 @@ def IntelFPGABankBits : Attr {
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let Args = [VariadicExprArgument<"Args">];
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let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
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Field], ErrorDiag>;
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- let LangOpts = [SYCLIsDevice, SYCLIsHost ];
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+ let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost ];
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let Documentation = [IntelFPGABankBitsDocs];
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}
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def : MutualExclusions<[IntelFPGARegister, IntelFPGABankBits]>;
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