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d565980
[AIX][TLS] Generate 64-bit local-exec access code sequence
amy-kwan Jun 17, 2023
1390675
[SpecialCaseList] Remove TrigramIndex
ellishg Jun 19, 2023
3350ec9
[libc++] Add missing 'return 0' from main functions in tests
ldionne Jun 19, 2023
2da4517
Reland "[DebugMetadata][DwarfDebug] Support function-local types in l…
dzhidzhoev Jun 19, 2023
21e1651
[libc] Remove the requirement of a platform-flush operation in File a…
Jun 16, 2023
2e6bb8c
[DebugInfo] Support more than 2 operands in DWARF operations
slinder1 Jun 19, 2023
407dcaf
[Driver] Correct -fnoxray-link-deps to -fno-xray-link-deps
MaskRay Jun 19, 2023
b3a08fa
[AMDGPU] Remove unused macro CNT_MASK
jayfoad Jun 19, 2023
4b6d41c
[AMDGPU] Do not release VGPRs if there may be pending scratch stores
jayfoad Jun 19, 2023
5866935
[DebugInfo] Add DW_OP_LLVM_user extension point
slinder1 May 17, 2023
b7a86d0
[xray][test] Test __xray_typedevent after D43668
MaskRay Jun 19, 2023
199f7dd
[XRay][X86] Remove sled version 0 support from patchCustomEvent
MaskRay Jun 19, 2023
fec7c64
Revert "Reland "[DebugMetadata][DwarfDebug] Support function-local ty…
dzhidzhoev Jun 19, 2023
cb9ac70
Reland "[DebugMetadata][DwarfDebug] Support function-local types in l…
dzhidzhoev Jun 19, 2023
a132f5e
[BOLT] Fix a warning in release builds
kazutakahirata Jun 20, 2023
3fa3cb4
[XRay] Make llvm.xray.typedevent parameter type match __xray_typedevent
MaskRay Jun 20, 2023
dafaa84
[XRay] Make llvm.xray.customevent parameter type match __xray_custome…
MaskRay Jun 20, 2023
516e326
[X86][AMX] set Stride to Tile's Col when doing combine amxcast and st…
yubingex007-a11y Jun 19, 2023
cb353dc
[LV] Add cost model for simd vector select instructions of type float
vfdff Jun 20, 2023
7ac0ff5
[lldb] Make test for D153043 independent of external symbols
Jun 20, 2023
a18b17b
[lldb] Make the test for D153043 linux-only
Jun 20, 2023
f8a4cd0
[xray][AArch64] Rewrite trampoline
MaskRay Jun 20, 2023
a3b9c15
[tools] Use llvm::is_contained (NFC)
kazutakahirata Jun 20, 2023
18ec203
[mlir][transform] Add ApplyRegisteredPassOp transform op
matthias-springer Jun 20, 2023
ab32cc6
[include-cleaner] Bailout on invalid code for the command-line tool
hokein Jun 19, 2023
c307502
[clangd] Index the type of a non-type template parameter
HighCommander4 Jun 20, 2023
aa7b127
[AMDGPU] Start documenting calling conventions. NFC
rovka Jun 7, 2023
d116f20
Fixup D151996
rovka Jun 20, 2023
aad5141
Revert "Prevent deadlocks in death tests."
martinboehme Jun 20, 2023
99610fa
Revert "[AMDGPU] Start documenting calling conventions. NFC"
rovka Jun 20, 2023
56e33d9
[CSKY][test][NFC] Add more tests of multiplication with immediates
benshi001 Jun 19, 2023
6d05f3f
[CSKY] Optimize multiplication with immediates
benshi001 Jun 19, 2023
189d944
[docs] Fix GEP faq references to undefined behavior [NFC]
nunoplopes Jun 20, 2023
c146df9
[clang][DebugInfo] Emit DW_AT_deleted on any deleted member function
Michael137 Jun 19, 2023
f6be081
[llvm-profdata] Fix llvm-profdata help and make sure it remains in sync
serge-sans-paille Jun 19, 2023
5c5eff4
[AMDGPU] Start documenting calling conventions. NFC
rovka Jun 7, 2023
041bfe4
[AMDGPU] Document amdgpu_cs_chain[_preserve] CCs. NFC
rovka Jun 7, 2023
06ebed3
[SCEVNormalization] Short circuit case with no loops (NFC)
nikic Jun 20, 2023
c63d2b2
[mlir][transform] Add TransformRewriter
matthias-springer Jun 20, 2023
fc06262
[llc][MISched] Add `-misched-detail-resource-booking` to llc.
fpetrogalli Jun 20, 2023
25f8b1a
Revert "[llc][MISched] Add `-misched-detail-resource-booking` to llc."
fpetrogalli Jun 20, 2023
37db9ca
[llc][MISched] Add `-misched-detail-resource-booking` to llc.
fpetrogalli Jun 20, 2023
dec42ff
[AMDGPU][GFX11] Add test coverage for FMA instructions.
kosarev Jun 20, 2023
c7430ff
[CodeGen][test] Add missing `REQUIRES`.
fpetrogalli Jun 20, 2023
1c64c41
[clang][index] Fix cast warning
jansvoboda11 Jun 20, 2023
2d3e6c4
[AMDGPU] Drop GFX11 runs for dagcombine-fma-fmad.ll and fma.f16.ll.
kosarev Jun 20, 2023
b6f3062
[Coroutines] Store the index for final suspend point in the exception…
ChuanqiXu9 Jun 20, 2023
36d5034
[clang][NFC] Drop alignment in builtin-nondeterministic-value test
ManuelJBrito Jun 11, 2023
ef9159c
[AArch64] Add Cortex-A510 specific scheduling
harviniriawan Jun 20, 2023
e2b19ef
[mlir] mark libraries in mlir/examples as such
ftynse Jun 19, 2023
f6c1796
[DWARFLinker] add DWARFUnit::getIndexedAddressOffset().
avl-llvm Jun 19, 2023
6bea833
Revert "Reland "[DebugMetadata][DwarfDebug] Support function-local ty…
dzhidzhoev Jun 20, 2023
149f309
[include-cleaner] Ignore the ParmVarDecl itself in WalkAST.cpp
hokein Jun 20, 2023
87da4b6
[mlir][Pass] Check supported op types before running a pass
matthias-springer Jun 20, 2023
8784b6a
[Clang] Allow bitcode linking when the input is LLVM-IR
jhuber6 Jun 7, 2023
efacdfc
[LinkerWrapper] Support linking vendor bitcode late
jhuber6 Jun 8, 2023
8cf8956
[lld][Arm] Big Endian - Byte invariant support.
simpal01 May 18, 2023
1d27ad2
[AArch64] Add tablegen patterns for fp16 fcvtn2.
davemgreen Jun 20, 2023
2efdacf
[LoongArch] Add missing chains and remove unnecessary `SDNPSideEffect…
SixWeining Jun 20, 2023
5dbd511
[libc][math] Improve tanhf performance.
lntue Jun 15, 2023
0ae409c
[libc][math] Slightly improve sinhf and coshf performance.
lntue Jun 15, 2023
46aa659
[libc][math] Improve exp2f performance.
lntue Jun 16, 2023
1f1385d
[LoongArch] Indent LoongArchInstrInfo.td a little bit. NFC
SixWeining Jun 20, 2023
699adde
[AMDGPU] Use verify<domtree> instead of intra-pass asserts.
pravinjagtap Jun 20, 2023
3dd319e
[LoongArch] Optimize conditional selection of integer
SixWeining Jun 20, 2023
fed6cd9
[AMDGPU] Remove unused method Waitcnt::dominates(). NFC
stepthomas Jun 20, 2023
cce0818
[AArch64] Try to fold uaddlv and uaddlp
jaykang10 Jun 19, 2023
3095dd0
[AArch64] Use ISD::isExtOpcode. NFC
davemgreen Jun 20, 2023
ff23856
[DAG] Fold (abds x, y) -> (abdu x, y) iff both args are known positive
RKSimon Jun 20, 2023
b9648c7
[llvm-nm] Avoid -opaque-pointers option in test (NFC)
nikic Jun 20, 2023
aa79ad4
[Bitcode] Remove -opaque-pointer=0 check lines (NFC)
nikic Jun 20, 2023
db3bbdc
[DebugInfo] Convert tests to opaque pointers (NFC)
nikic Jun 20, 2023
2da049a
[libc++] Add incomplete availability markup for std::pmr
ldionne Mar 29, 2023
135aaff
[LTO] Avoid -opaque-pointers=0 in test (NFC)
nikic Jun 20, 2023
43ad2e9
[DAG] Add getExtOrTrunc helper. NFC.
RKSimon Jun 20, 2023
3fbbfa7
[SafepointIRVerifier] Convert test to opaque pointers (NFC)
nikic Jun 20, 2023
946116f
[NFC][libc++] Addresses LWG3935.
mordante Jun 19, 2023
ffe0495
[NFC][libc++] Addresses LWG3927.
mordante Jun 19, 2023
a6da361
[LoopVersioning] Regenerate test checks (NFC)
nikic Jun 20, 2023
538d355
[LoopVersioning] Convert tests to opaque pointers (NFC)
nikic Jun 20, 2023
c20d81b
[libc++] Add missing [[maybe_unused]] attribute in format tests
ldionne Jun 19, 2023
bca11ba
[clang-format] Add InsertNewlineAtEOF to .clang-format files
owenca Jun 17, 2023
c74c618
[Attributor] Convert some tests to opaque pointers (NFC)
nikic Jun 20, 2023
d5c5265
[Attributor] Name instructions in test (NFC)
nikic Jun 20, 2023
f1dda96
[Attributor] Convert test to opaque pointers (NFC)
nikic Jun 20, 2023
bc1fb56
[AArch64][SME] Rename strided load/store enums
MDevereau Jun 20, 2023
29ce367
llvm-reduce: Fix introducing invalid uses of intrinsics
arsenm Jun 20, 2023
7dcb9c0
InlineSpiller: Consider copy bundles when looking for snippet copies
arsenm Mar 20, 2023
d885138
Revert "[lld][Arm] Big Endian - Byte invariant support."
simpal01 Jun 20, 2023
8680c28
[RISCV] Remove mask from vrgatherei16 in lowerVECTOR_INTERLEAVE.
topperc Jun 20, 2023
5914841
Update tests due to retrainNode refactoring
jsji Jun 20, 2023
f5ae075
[AIX][TLS] Generate 32-bit local-exec access code sequence
amy-kwan Jun 20, 2023
e777da4
AMDGPU: Delete old AMDGPUPropagateAttributes pass
arsenm Jun 19, 2023
0cb977d
[lld] Make lit files relocatable
nico Jun 14, 2023
ec146cb
[LV] Add support for minimum/maximum intrinsics
annamthomas Jun 13, 2023
f5b8202
[libc++][CI] Install newer CMake version.
mordante Jun 18, 2023
09addf9
[libc++][format] Fixes UTF-8 continuation.
mordante Apr 21, 2023
2020545
[libc++][test] Removes old fallbacks.
mordante Jun 4, 2023
a5931e2
[libc++][format] Removes an AIX work-around.
mordante Jun 5, 2023
59f266d
[chrono][test] Fixes some tests on Windows.
mordante Jun 3, 2023
b1aba05
Merge from 'sycl' to 'sycl-web'
Jun 20, 2023
6fe9cfe
[clangd] Use resolveTypeToRecordDecl() to resolve the type of a base …
HighCommander4 Jun 12, 2023
51e917d
[SLP] Silence -Wswitch warning after ec146cb7c0b4a162ee73463e6c7bb306…
d0k Jun 20, 2023
1938039
[mlir][Transform] Allow parameter and value types in merge_handles op
qedawkins Jun 14, 2023
7c83651
[2/3][RISCV][POC] Model vxrm in LLVM intrinsics and machine instructi…
eopXD May 23, 2023
5510f0b
[3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point inst…
eopXD May 25, 2023
9ed668a
[RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
eopXD Jun 14, 2023
7ddda85
[gn build] Port 7c8365121a7d
llvmgnsyncbot Jun 20, 2023
f31f4ad
[DebugInfo][NFC] Remove dead lines of test input
felipepiovezan Jun 19, 2023
8af224d
[DebugInfo] Fix emission of empty debug_names for Apple
felipepiovezan Jun 19, 2023
19c26a7
[scudo] Finer lock granularity in Region of SizeClassAllocator64
ChiaHungDuan Jun 15, 2023
a2df87c
[libc] Fix libmath test compilation when using UInt<T>
mikhailramalho Jun 19, 2023
556b563
[OpenMP] Disable some tests for AArch64
ceseo Jun 20, 2023
5a6e6ad
[libc++] Make sure our .clang-format is used for all languages
ldionne Jun 16, 2023
98c4ab1
[AMDGPU] Simplify BlockInfo in SIInsertWaitcnts. NFC.
jayfoad Jun 20, 2023
1d0f4a8
[Docs] Update llvm-test-suite PGO instructions to use LLVM IR PGO by
mingmingl-llvm Jun 12, 2023
b697969
Fix mlir windows buildbot after ec146cb7c0b4
annamthomas Jun 20, 2023
f9bce19
[mlir][async] Mark exported symbols of runtime lib as visible.
ingomueller-net Jun 20, 2023
bba2b65
[mlir][RunnerUtils] Make symbols private + implement loading mechanism.
ingomueller-net Jun 19, 2023
0ce2ce2
Revert "Fix mlir windows buildbot after ec146cb7c0b4"
annamthomas Jun 20, 2023
f1a0402
[mlir][irdl] Add `irdl.attributes` operation for defining named attri…
unterumarmung Jun 20, 2023
dbc283b
[Hexagon] Handle 64-bit operands when lowering ADDO/SUBO
Jun 20, 2023
4eeb364
Remove declaration for unimplemented function `function_interface_imp…
joker-eph Jun 20, 2023
6eca120
Improve MLIR "view-op-graph" to color operations according to their name
joker-eph Jun 19, 2023
51ae58d
Merge from 'main' to 'sycl-web' (213 commits)
Jun 20, 2023
964a535
[libc] Remove flexible array and replace with a template
jhuber6 Jun 19, 2023
56e36e4
[UsersManual] Add llvm-progen as an alternative tool for AutoFDO prof…
htyu Jun 20, 2023
333384c
[libc++][NFC] clang-format filesystem_error.h
ldionne Jun 20, 2023
eb1442d
[llvm-objcopy] -O binary: do not align physical addresses
quic-akaryaki Jun 20, 2023
6be2d59
Fix MLIR test after 6eca120dd8d3e
joker-eph Jun 20, 2023
ee6ace2
[libc] Remove disabled pass after performance improvement
jhuber6 Jun 20, 2023
148075c
[clang][test] Refactor FileCheck metadata in pragma-followup_inner.cpp
jmciver Jun 19, 2023
7ab749c
[Bazel][mlir] Fix after bba2b656110209a3d9863b92c060082479b06ab1
chsigg Jun 20, 2023
f55fd19
Define/guard MLIR_STANDALONE_BUILD LLVM_LIBRARY_OUTPUT_INTDIR var.
stellaraccident Jun 20, 2023
e28bb6c
[SelectionDAG] Remove isNullValue and isAllOnesValue
kazutakahirata Jun 20, 2023
ebc757d
Revert "[llvm-objcopy] -O binary: do not align physical addresses"
Jun 20, 2023
b0b9605
[lldb][ObjectFileELF] Set ModuleSpec file offset and size
splhack Jun 12, 2023
6c87315
[BOLT] Sort CallSiteInfo targets by symbol name in YAMLWriter
aaupov Jun 20, 2023
12dee9d
[lldb][Android] Support zip .so file
splhack Jun 12, 2023
df35fc1
[gn build] Port 12dee9d3cd76
llvmgnsyncbot Jun 20, 2023
c973123
[llvm-objcopy] -O binary: do not align physical addresses
quic-akaryaki Jun 20, 2023
55a2c4e
[lsan] Remove use_tls=0 from a few tests
speednoisemovement Jun 15, 2023
cf49e99
Guard OP for [CGCall] Directly create opaque pointers (NFCI) [b92ccc3]
Chenyang-L Jun 20, 2023
cdbdf93
[mlir][sparse][gpu] extend SDDMM gpu test
aartbik Jun 20, 2023
49f55b0
[lldb][Android] Add PlatformAndroidTest
splhack Jun 13, 2023
fabd16c
[lldb][Android] Add platform.plugin.remote-android.package-name
splhack Jun 14, 2023
72df12c
[llvm-exegesis] Refactor FunctionExecutorImpl and create factory
boomanaiden154 Jun 21, 2023
0150493
Try to implement lambdas with inalloca parameters by forwarding witho…
amykhuang Nov 7, 2022
5e9173c
[llvm-exegesis] Add ability to assign perf counters to specific PID
boomanaiden154 May 20, 2023
8060cd3
Revert [clang] Replace use of Type::getPointerTo() (NFC) - guard most…
Chenyang-L Jun 21, 2023
4f42d74
Merge from 'sycl' to 'sycl-web'
Jun 21, 2023
c17090f
Merge from 'main' to 'sycl-web' (5 commits)
Jun 21, 2023
7d6b824
[test] Regenerate test checks
aeubanks Jun 21, 2023
06f9420
ValueTracking: Ignore -0 for nsz sqrt with UseInstrInfo in computeKno…
arsenm Apr 25, 2023
0d4ef4f
[llvm-exegesis] Introduce Subprocess Executor Mode
boomanaiden154 May 20, 2023
f7233b3
Merge from 'main' to 'sycl-web' (1 commits)
Jun 21, 2023
b9a907d
Convert MLIR IndentedOstream to header only.
stellaraccident Jun 21, 2023
8c6668f
[llvm-exegesis] Fix -Wunused-variable in BenchmarkRunner.cpp (NFC)
DamonFool Jun 21, 2023
08aeb7c
Revert "[llvm-exegesis] Introduce Subprocess Executor Mode"
boomanaiden154 Jun 21, 2023
48610e2
Merge from 'main' to 'sycl-web' (3 commits)
jsji Jun 21, 2023
e105141
[Driver] Allow XRay for more architectures on ELF systems
MaskRay Jun 21, 2023
82ef86c
[BOLT] Set IsRelro section attribute based on PT_GNU_RELRO segment
aaupov Jun 21, 2023
d5bebb3
[Driver] Allow XRay on Apple Silicon
ilammy Jun 21, 2023
8653db9
[lld-macho][test] Make reloc-subtractor.s robust
MaskRay Jun 21, 2023
b1cab31
[docs][TableGen][Target] Improve the documentation of the attribute v…
topperc Jun 21, 2023
832eb93
[RISCV] Reduce some duplicate code in lowerBUILD_VECTOR. NFC
topperc Jun 21, 2023
75d70b7
[libc] Make close function of the internal File class cleanup the fil…
Jun 20, 2023
e0a6561
[XRay] Make xray_fn_idx entries PC-relative
MaskRay Jun 21, 2023
48abcf1
[libc++][format] Adds formattable-with concept.
mordante Apr 16, 2023
1c27275
[DAG] Unroll and expand illegal result of LDEXP and POWI instead of w…
tianleliu Jun 21, 2023
4ef6028
[mlir][bufferization] Allow to_memref ops in One-Shot Analysis
matthias-springer Jun 20, 2023
3e12cf2
[mlir][tensor][NFC] TilingInterface: Use Attribute instead of Value
matthias-springer Jun 21, 2023
2268459
[mlir][Interfaces] TilingInterface: Add test case for linalg.copy on …
matthias-springer Jun 21, 2023
61e9198
[RISCV] Add errors for mixing Zcmp with C/Zcd and D.
topperc Jun 21, 2023
9fa7998
[libc] Support for riscv32
petrhosek Jun 9, 2023
dae8c72
[mlir][linalg] TileToForallOp: Support memref ops
matthias-springer Jun 21, 2023
42a82b1
[mlir][linalg][NFC] Add test case for memref vectorization
matthias-springer Jun 21, 2023
c9e08fa
[RISCV] Add a pass to merge moving parameter registers instructions f…
Xinlong-Wu Jun 21, 2023
6f654a8
[gn build] Port c9e08fa60666
llvmgnsyncbot Jun 21, 2023
4d618b5
[llvm-exegesis] Introduce Subprocess Executor Mode
boomanaiden154 May 20, 2023
3dde260
[mlir] #include CRunnerUtils.h instead of RunnerUtils.h in SPIRV-runner
chsigg Jun 21, 2023
1b9b78f
[llvm-exegesis] Introduce SubprocessMemory Utility Class
boomanaiden154 May 20, 2023
5e67ae1
[BOLT][RISCV] Implement return/unconditional branch creation
mtvec Jun 21, 2023
41b8aed
[BOLT][RISCV] Implement branch reversal
mtvec Jun 21, 2023
b6556dc
[BOLT][RISCV] Fix implementation of getTargetSymbol
mtvec Jun 21, 2023
adbb5eb
ReleaseNotes: __builtin_unpredictable is now handled by X86 Backend
davidbolvansky Jun 21, 2023
00786d3
[LoongArch] Support CodeModel::Large codegen
xen0n Jun 21, 2023
edc9e2c
Revert "[llvm-exegesis] Introduce SubprocessMemory Utility Class"
boomanaiden154 Jun 21, 2023
ba85f20
[lldb] Add "register info" command
DavidSpickett Mar 1, 2023
e0743ff
[gn build] Port ba85f206fe6f
llvmgnsyncbot Jun 21, 2023
72ac907
[C++20] [Modules] Use the canonical decl when getting associated cons…
ChuanqiXu9 Jun 21, 2023
e83c8c3
[Bazel][mlir] Fix ODR violation introduced in 7ab749c.
chsigg Jun 21, 2023
92af118
[ConstantHoisting] Convert tests to opaque pointers (NFC)
nikic Jun 21, 2023
82dca8a
[ConstantHoisting] Regenerate test checks (NFC)
nikic Jun 21, 2023
8b73a2e
[LLDB] Add table formatting for register fields
DavidSpickett Jun 5, 2023
650041a
[Inline] Convert tests to opaque pointers (NFC)
nikic Jun 21, 2023
4c51f0d
[Inline] Regenerate test checks (NFC)
nikic Jun 21, 2023
c7759df
[lldb] Correct spelling in RegisterFlags comments
DavidSpickett Jun 21, 2023
9119325
[mlir][CRunnerUtils] Use explicit execution engine symbol registration.
ingomueller-net Jun 20, 2023
dfb85c3
[Clang][Interp] Diagnose uninitialized ctor of global record arrays
hazohelet Jun 21, 2023
64df75f
[DWARFLinker][DWARFv5] change emitSLEB128IntValue with emitULEB128Int…
avl-llvm Jun 16, 2023
c42f0a6
PowerPC/SPE: Add phony registers for high halves of SPE SuperRegs
Long5hot Jun 21, 2023
ecb07f4
[SVE ACLE] Implement IR combines to convert intrinsics used for _m C/…
JolantaJensen May 17, 2023
15a1f7f
[AppleTables] Implement iterator over all entries in table
felipepiovezan Jun 15, 2023
6f7c9d1
[RewriteStatepointsForGC] Convert tests to opaque pointers (NFC)
nikic Jun 21, 2023
bcfe5a5
[lldb] Add register field tables to the "register info" command
DavidSpickett Jun 5, 2023
e0867e2
[lldb] Add release note for "register info" command
DavidSpickett Jun 5, 2023
355dab0
[ConstraintSystem] Fix mislabeling in unittests (NFC)
antoniofrighetto Jun 21, 2023
c68c6c5
[AMDGPU] Minor refactoring in SILoadStoreOptimizer::offsetsCanBeCombined
jayfoad Jun 21, 2023
10e3ed9
[Flang][Debug] NFC: Correct the REQUIRES line to use system-linux
kiranchandramohan Jun 21, 2023
8e1e871
[AMDGPU] Preserve dom-tree analysis in atomic optimizer.
pravinjagtap Jun 21, 2023
699e64c
Revert "[Bazel][mlir] Fix ODR violation introduced in 7ab749c."
chsigg Jun 21, 2023
9ff36c2
[libc++] Guard terminate_successful with TEST_HAS_NO_EXCEPTIONS
ldionne Jun 19, 2023
bd1cba9
Revert D148717 "[libc] Improve memcmp latency and codegen"
gchatelet Jun 21, 2023
6e04287
[SystemZ] Fix regression in test macro-prefix-map-lambda.cpp
redstar Jun 20, 2023
0b8a2ea
[AMDGPU] Add some positive tests for merging S_LOAD instructions
jayfoad Jun 21, 2023
afc5cca
[libc++] Get rid of _LIBCPP_DISABLE_NEW_DELETE_DEFINITIONS
ldionne Jun 14, 2023
ae9ae29
Merge from 'sycl' to 'sycl-web'
Jun 21, 2023
c4fea39
[LLD][ELF] Cortex-M Security Extensions (CMSE) Support
amilendra Jun 21, 2023
7332959
Merge from 'main' to 'sycl-web' (101 commits)
kchusha Jun 21, 2023
80e2c26
RegisterCoalescer: Fix name of pass
arsenm Jun 21, 2023
6418885
Merge from 'sycl' to 'sycl-web' (2 commits)
Jun 21, 2023
1ec9861
Merge from 'main' to 'sycl-web' (3 commits)
kchusha Jun 21, 2023
1dd5570
add back OP guards that were removed from conflict
Chenyang-L Jun 21, 2023
76296c4
Merge from 'sycl' to 'sycl-web'
Jun 21, 2023
2bd909d
Merge from 'main' to 'sycl-web' (23 commits)
Jun 21, 2023
ff30074
resolve lit
Chenyang-L Jun 21, 2023
b1e9165
Guard with OP after Revert "[clang] Replace uses of CGBuilderTy::Crea…
Chenyang-L Jun 21, 2023
8c01e0f
Port lit tests to stop using clang -no-opaque-pointers.
jcranmer-intel Jun 2, 2023
45e57da
Only generate BuildIdentifier if non-semantic debug is enabled (#2040)
LU-JOHN Jun 9, 2023
fd83926
Adjust several lit tests to use opaque pointers. (#2037)
jcranmer-intel Jun 9, 2023
7e710ae
Implement DebugLine and DebugNoLine (#2012)
LU-JOHN Jun 9, 2023
34d0865
Adjust TypeInheritance for NonSemantic spec (#2039)
vmaksimo Jun 9, 2023
e9058ee
Add Column parameter to DebugInlinedAt instruction (#2042)
vmaksimo Jun 11, 2023
e1dcbc3
Add debug info for bitfield members (#1907)
asudarsa Jun 13, 2023
c379814
Update for expandMemMoveAsLoop API change
svenvh Jun 13, 2023
586dd8c
Update DebugInfo tests after retainedNodes change
svenvh Jun 14, 2023
122bdc4
cmake: Fix using spirv-tools package on Ubuntu 22.04
kbenzie Jun 8, 2023
77f72e6
Update DebugInfo tests after DWARF emission fix
svenvh Jun 16, 2023
ac09fd2
Update DebugInfo/FortranArray test after DWARF emission fix (#2054)
vmaksimo Jun 17, 2023
22d83e0
Fix crash with --spirv-preserve-auxdata and removed function (#2052)
sarnex Jun 19, 2023
2a58c3d
Merge remote-tracking branch 'origin/sycl' into llvmspirv_pulldown
Chenyang-L Jun 26, 2023
a49c666
Revert "[CGTypes] Remove recursion protection" Guard within macro
jsji Jun 23, 2023
841df35
Add -opaque-pointers=1 to some tests to fix them
kchusha Jun 28, 2023
5cbdbbc
Missing -opaque-pointers=1 in lit
Chenyang-L Jun 28, 2023
997ae87
Revert "[LLD][ELF] Cortex-M Security Extensions (CMSE) Support"
amilendra Jun 21, 2023
4d80f16
Remove XFAIL
jsji Jun 29, 2023
138c387
X86: Fix asserts only test
arsenm Jun 21, 2023
ed9e4aa
[SYCL] Adapt to sycl 2020 exceptions (#9771)
pwisniewskimobica Jun 27, 2023
e3c2570
[SYCL] Use sycl::exception instead of sycl::runtime_error (#10217)
AlexeySachkov Jul 6, 2023
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3 changes: 3 additions & 0 deletions .git-blame-ignore-revs
Original file line number Diff line number Diff line change
Expand Up @@ -55,3 +55,6 @@ dd3c26a045c081620375a878159f536758baba6e
f98ee40f4b5d7474fc67e82824bf6abbaedb7b1c
2238dcc39358353cac21df75c3c3286ab20b8f53
f9008e6366c2496b1ca1785b891d5578174ad63e

# [libc++][NFC] Apply clang-format on large parts of the code base
5aa03b648b827128d439f705cd7d57d59673741d
2 changes: 1 addition & 1 deletion bolt/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ list(INSERT CMAKE_MODULE_PATH 0 "${BOLT_SOURCE_DIR}/cmake/modules")

# Determine default set of targets to build -- the intersection of
# those BOLT supports and those LLVM is targeting.
set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86")
set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV")
set(BOLT_TARGETS_TO_BUILD_default)
foreach (tgt ${BOLT_TARGETS_TO_BUILD_all})
if (tgt IN_LIST LLVM_TARGETS_TO_BUILD)
Expand Down
4 changes: 4 additions & 0 deletions bolt/CODE_OWNERS.TXT
Original file line number Diff line number Diff line change
Expand Up @@ -20,3 +20,7 @@ D: DWARF support
N: Vladislav Khmelevsky
E: [email protected]
D: AArch64 backend

N: Job Noorman
E: [email protected]
D: RISC-V backend
15 changes: 5 additions & 10 deletions bolt/include/bolt/Core/BinaryContext.h
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,6 @@ using namespace object;
namespace bolt {

class BinaryFunction;
class ExecutableFileMemoryManager;

/// Information on loadable part of the file.
struct SegmentInfo {
Expand Down Expand Up @@ -313,10 +312,6 @@ class BinaryContext {
FilterIterator<binary_data_const_iterator>;
using FilteredBinaryDataIterator = FilterIterator<binary_data_iterator>;

/// Memory manager for sections and segments. Used to communicate with ORC
/// among other things.
std::shared_ptr<ExecutableFileMemoryManager> EFMM;

StringRef getFilename() const { return Filename; }
void setFilename(StringRef Name) { Filename = std::string(Name); }

Expand Down Expand Up @@ -727,6 +722,8 @@ class BinaryContext {
TheTriple->getArch() == llvm::Triple::x86_64;
}

bool isRISCV() const { return TheTriple->getArch() == llvm::Triple::riscv64; }

// AArch64-specific functions to check if symbol is used to delimit
// code/data in .text. Code is marked by $x, data by $d.
MarkerSymType getMarkerType(const SymbolRef &Symbol) const;
Expand Down Expand Up @@ -845,13 +842,11 @@ class BinaryContext {
/// Return BinaryData for the given \p Name or nullptr if no
/// global symbol with that name exists.
const BinaryData *getBinaryDataByName(StringRef Name) const {
auto Itr = GlobalSymbols.find(Name);
return Itr != GlobalSymbols.end() ? Itr->second : nullptr;
return GlobalSymbols.lookup(Name);
}

BinaryData *getBinaryDataByName(StringRef Name) {
auto Itr = GlobalSymbols.find(Name);
return Itr != GlobalSymbols.end() ? Itr->second : nullptr;
return GlobalSymbols.lookup(Name);
}

/// Return registered PLT entry BinaryData with the given \p Name
Expand Down Expand Up @@ -1165,7 +1160,7 @@ class BinaryContext {

/// Return a dynamic relocation registered at a given \p Address, or nullptr
/// if there is no dynamic relocation at such address.
const Relocation *getDynamicRelocationAt(uint64_t Address);
const Relocation *getDynamicRelocationAt(uint64_t Address) const;

/// Remove registered relocation at a given \p Address.
bool removeRelocationAt(uint64_t Address);
Expand Down
22 changes: 15 additions & 7 deletions bolt/include/bolt/Core/BinaryFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -384,6 +384,10 @@ class BinaryFunction {
/// Indicates the type of profile the function is using.
uint16_t ProfileFlags{PF_NONE};

/// True if the function's input profile data has been inaccurate but has
/// been adjusted by the profile inference algorithm.
bool HasInferredProfile{false};

/// For functions with mismatched profile we store all call profile
/// information at a function level (as opposed to tying it to
/// specific call sites).
Expand Down Expand Up @@ -1124,11 +1128,7 @@ class BinaryFunction {
/// secondary entry point into the function, then return a global symbol
/// that represents the secondary entry point. Otherwise return nullptr.
MCSymbol *getSecondaryEntryPointSymbol(const MCSymbol *BBLabel) const {
auto I = SecondaryEntryPoints.find(BBLabel);
if (I == SecondaryEntryPoints.end())
return nullptr;

return I->second;
return SecondaryEntryPoints.lookup(BBLabel);
}

/// If the basic block serves as a secondary entry point to the function,
Expand Down Expand Up @@ -1566,6 +1566,12 @@ class BinaryFunction {
/// Return flags describing a profile for this function.
uint16_t getProfileFlags() const { return ProfileFlags; }

/// Return true if the function's input profile data has been inaccurate but
/// has been corrected by the profile inference algorithm.
bool hasInferredProfile() const { return HasInferredProfile; }

void setHasInferredProfile(bool Inferred) { HasInferredProfile = Inferred; }

void addCFIInstruction(uint64_t Offset, MCCFIInstruction &&Inst) {
assert(!Instructions.empty());

Expand Down Expand Up @@ -2040,9 +2046,11 @@ class BinaryFunction {
void handleAArch64IndirectCall(MCInst &Instruction, const uint64_t Offset);

/// Scan function for references to other functions. In relocation mode,
/// add relocations for external references.
/// add relocations for external references. In non-relocation mode, detect
/// and mark new entry points.
///
/// Return true on success.
/// Return true on success. False if the disassembly failed or relocations
/// could not be created.
bool scanExternalRefs();

/// Return the size of a data object located at \p Offset in the function.
Expand Down
16 changes: 10 additions & 6 deletions bolt/include/bolt/Core/BinarySection.h
Original file line number Diff line number Diff line change
Expand Up @@ -56,10 +56,11 @@ class BinarySection {
unsigned Alignment; // alignment in bytes (must be > 0)
unsigned ELFType; // ELF section type
unsigned ELFFlags; // ELF section flags
bool IsRelro{false}; // GNU RELRO section (read-only after relocation)

// Relocations associated with this section. Relocation offsets are
// wrt. to the original section address and size.
using RelocationSetType = std::set<Relocation, std::less<>>;
using RelocationSetType = std::multiset<Relocation, std::less<>>;
RelocationSetType Relocations;

// Dynamic relocations associated with this section. Relocation offsets are
Expand Down Expand Up @@ -90,7 +91,7 @@ class BinarySection {
uint64_t OutputFileOffset{0}; // File offset in the rewritten binary file.
StringRef OutputContents; // Rewritten section contents.
const uint64_t SectionNumber; // Order in which the section was created.
unsigned SectionID{-1u}; // Unique ID used for address mapping.
std::string SectionID; // Unique ID used for address mapping.
// Set by ExecutableFileMemoryManager.
uint32_t Index{0}; // Section index in the output file.
mutable bool IsReordered{false}; // Have the contents been reordered?
Expand Down Expand Up @@ -287,6 +288,8 @@ class BinarySection {
}
bool isReordered() const { return IsReordered; }
bool isAnonymous() const { return IsAnonymous; }
bool isRelro() const { return IsRelro; }
void setRelro() { IsRelro = true; }
unsigned getELFType() const { return ELFType; }
unsigned getELFFlags() const { return ELFFlags; }

Expand Down Expand Up @@ -345,7 +348,8 @@ class BinarySection {
bool removeRelocationAt(uint64_t Offset) {
auto Itr = Relocations.find(Offset);
if (Itr != Relocations.end()) {
Relocations.erase(Itr);
auto End = Relocations.upper_bound(Offset);
Relocations.erase(Itr, End);
return true;
}
return false;
Expand Down Expand Up @@ -430,18 +434,18 @@ class BinarySection {
}
uint64_t getOutputAddress() const { return OutputAddress; }
uint64_t getOutputFileOffset() const { return OutputFileOffset; }
unsigned getSectionID() const {
StringRef getSectionID() const {
assert(hasValidSectionID() && "trying to use uninitialized section id");
return SectionID;
}
bool hasValidSectionID() const { return SectionID != -1u; }
bool hasValidSectionID() const { return !SectionID.empty(); }
bool hasValidIndex() { return Index != 0; }
uint32_t getIndex() const { return Index; }

// mutation
void setOutputAddress(uint64_t Address) { OutputAddress = Address; }
void setOutputFileOffset(uint64_t Offset) { OutputFileOffset = Offset; }
void setSectionID(unsigned ID) {
void setSectionID(StringRef ID) {
assert(!hasValidSectionID() && "trying to set section id twice");
SectionID = ID;
}
Expand Down
48 changes: 48 additions & 0 deletions bolt/include/bolt/Core/Linker.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
//===- bolt/Core/Linker.h - BOLTLinker interface ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the interface BOLT uses for linking.
//
//===----------------------------------------------------------------------===//

#ifndef BOLT_CORE_LINKER_H
#define BOLT_CORE_LINKER_H

#include "llvm/ADT/StringRef.h"
#include "llvm/Support/MemoryBufferRef.h"

#include <cstdint>
#include <functional>
#include <optional>

namespace llvm {
namespace bolt {

class BinarySection;

class BOLTLinker {
public:
using SectionMapper =
std::function<void(const BinarySection &Section, uint64_t Address)>;
using SectionsMapper = std::function<void(SectionMapper)>;

virtual ~BOLTLinker() = default;

/// Load and link \p Obj. \p MapSections will be called before the object is
/// linked to allow section addresses to be remapped. When called, the address
/// of a section can be changed by calling the passed SectionMapper.
virtual void loadObject(MemoryBufferRef Obj, SectionsMapper MapSections) = 0;

/// Return the address of a symbol or std::nullopt if it cannot be found.
virtual std::optional<uint64_t> lookupSymbol(StringRef Name) const = 0;
};

} // namespace bolt
} // namespace llvm

#endif // BOLT_CORE_LINKER_H
19 changes: 16 additions & 3 deletions bolt/include/bolt/Core/MCPlusBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -336,9 +336,12 @@ class MCPlusBuilder {
initSizeMap();
}

/// Create and return target-specific MC symbolizer for the \p Function.
/// Create and return a target-specific MC symbolizer for the \p Function.
/// When \p CreateNewSymbols is set, the symbolizer can create new symbols
/// e.g. for jump table references.
virtual std::unique_ptr<MCSymbolizer>
createTargetSymbolizer(BinaryFunction &Function) const {
createTargetSymbolizer(BinaryFunction &Function,
bool CreateNewSymbols = true) const {
return nullptr;
}

Expand Down Expand Up @@ -431,7 +434,7 @@ class MCPlusBuilder {
}

/// Check whether we support inverting this branch
virtual bool isUnsupportedBranch(unsigned Opcode) const { return false; }
virtual bool isUnsupportedBranch(const MCInst &Inst) const { return false; }

/// Return true of the instruction is of pseudo kind.
bool isPseudo(const MCInst &Inst) const {
Expand Down Expand Up @@ -630,6 +633,12 @@ class MCPlusBuilder {
return false;
}

/// Returns true if First/Second is a AUIPC/JALR call pair.
virtual bool isRISCVCall(const MCInst &First, const MCInst &Second) const {
llvm_unreachable("not implemented");
return false;
}

/// If non-zero, this is used to fill the executable space with instructions
/// that will trap. Defaults to 0.
virtual unsigned getTrapFillValue() const { return 0; }
Expand Down Expand Up @@ -2029,6 +2038,10 @@ MCPlusBuilder *createAArch64MCPlusBuilder(const MCInstrAnalysis *,
const MCInstrInfo *,
const MCRegisterInfo *);

MCPlusBuilder *createRISCVMCPlusBuilder(const MCInstrAnalysis *,
const MCInstrInfo *,
const MCRegisterInfo *);

} // namespace bolt
} // namespace llvm

Expand Down
31 changes: 30 additions & 1 deletion bolt/include/bolt/Core/Relocation.h
Original file line number Diff line number Diff line change
Expand Up @@ -14,10 +14,11 @@
#ifndef BOLT_CORE_RELOCATION_H
#define BOLT_CORE_RELOCATION_H

#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/TargetParser/Triple.h"

namespace llvm {
class MCStreamer;
class MCSymbol;
class raw_ostream;

Expand Down Expand Up @@ -122,8 +123,36 @@ struct Relocation {
/// responsible for setting the position correctly.
size_t emit(MCStreamer *Streamer) const;

/// Emit a group of composed relocations. All relocations must have the same
/// offset. If std::distance(Begin, End) == 1, this is equivalent to
/// Begin->emit(Streamer).
template <typename RelocIt>
static size_t emit(RelocIt Begin, RelocIt End, MCStreamer *Streamer) {
if (Begin == End)
return 0;

const MCExpr *Value = nullptr;

for (auto RI = Begin; RI != End; ++RI) {
assert(RI->Offset == Begin->Offset &&
"emitting composed relocations with different offsets");
Value = RI->createExpr(Streamer, Value);
}

assert(Value && "failed to create relocation value");
auto Size = std::prev(End)->getSize();
Streamer->emitValue(Value, Size);
return Size;
}

/// Print a relocation to \p OS.
void print(raw_ostream &OS) const;

private:
const MCExpr *createExpr(MCStreamer *Streamer) const;
const MCExpr *createExpr(MCStreamer *Streamer,
const MCExpr *RetainedValue) const;
static MCBinaryExpr::Opcode getComposeOpcodeFor(uint64_t Type);
};

/// Relocation ordering by offset.
Expand Down
38 changes: 38 additions & 0 deletions bolt/include/bolt/Passes/FixRISCVCallsPass.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,38 @@
//===- bolt/Passes/FixRISCVCallsPass.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the FixRISCVCallsPass class, which sets the JALR immediate
// to 0 for AUIPC/JALR pairs with a R_RISCV_CALL(_PLT) relocation. This is
// necessary since MC expects it to be zero in order to or-in fixups.
//===----------------------------------------------------------------------===//

#ifndef BOLT_PASSES_FIXRISCVCALLSPASS_H
#define BOLT_PASSES_FIXRISCVCALLSPASS_H

#include "bolt/Passes/BinaryPasses.h"

namespace llvm {
namespace bolt {

class FixRISCVCallsPass : public BinaryFunctionPass {
void runOnFunction(BinaryFunction &Function);

public:
explicit FixRISCVCallsPass(const cl::opt<bool> &PrintPass)
: BinaryFunctionPass(PrintPass) {}

const char *getName() const override { return "fix-riscv-calls"; }

/// Pass entry point
void runOnFunctions(BinaryContext &BC) override;
};

} // namespace bolt
} // namespace llvm

#endif
4 changes: 4 additions & 0 deletions bolt/include/bolt/Profile/YAMLProfileReader.h
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,10 @@ class YAMLProfileReader : public ProfileReaderBase {
bool parseFunctionProfile(BinaryFunction &Function,
const yaml::bolt::BinaryFunctionProfile &YamlBF);

/// Infer function profile from stale data (collected on older binaries).
bool inferStaleProfile(BinaryFunction &Function,
const yaml::bolt::BinaryFunctionProfile &YamlBF);

/// Initialize maps for profile matching.
void buildNameMaps(std::map<uint64_t, BinaryFunction> &Functions);

Expand Down
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