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merged 3 commits into from
Aug 9, 2023
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[SYCL] Add missing Intel archs to sycl_ext_oneapi_device_architecture #10716

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bae64ca
[SYCL] Add missing Intel archs to sycl_ext_oneapi_device_architecture
dm-vodopyanov Aug 7, 2023
aea4667
Fix clang-format
dm-vodopyanov Aug 7, 2023
14fdb6b
Case -> Cases
dm-vodopyanov Aug 7, 2023
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121 changes: 61 additions & 60 deletions clang/lib/Driver/ToolChains/SYCL.cpp
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Expand Up @@ -641,65 +641,66 @@ void SYCL::gen::BackendCompiler::ConstructJob(Compilation &C,

StringRef SYCL::gen::resolveGenDevice(StringRef DeviceName) {
StringRef Device;
Device = llvm::StringSwitch<StringRef>(DeviceName)
.Cases("intel_gpu_bdw", "intel_gpu_8_0_0", "bdw")
.Cases("intel_gpu_skl", "intel_gpu_9_0_9", "skl")
.Cases("intel_gpu_kbl", "intel_gpu_9_1_9", "kbl")
.Cases("intel_gpu_cfl", "intel_gpu_9_2_9", "cfl")
.Cases("intel_gpu_apl", "intel_gpu_9_3_0", "apl")
.Cases("intel_gpu_glk", "intel_gpu_9_4_0", "glk")
.Cases("intel_gpu_whl", "intel_gpu_9_5_0", "whl")
.Cases("intel_gpu_aml", "intel_gpu_9_6_0", "aml")
.Cases("intel_gpu_cml", "intel_gpu_9_7_0", "cml")
.Cases("intel_gpu_icllp", "intel_gpu_11_0_0", "icllp")
.Cases("intel_gpu_tgllp", "intel_gpu_12_0_0", "tgllp")
.Case("intel_gpu_rkl", "rkl")
.Case("intel_gpu_adl_s", "adl_s")
.Case("intel_gpu_rpl_s", "rpl_s")
.Case("intel_gpu_adl_p", "adl_p")
.Case("intel_gpu_adl_n", "adl_n")
.Cases("intel_gpu_dg1", "intel_gpu_12_10_0", "dg1")
.Case("intel_gpu_acm_g10", "acm_g10")
.Case("intel_gpu_acm_g11", "acm_g11")
.Case("intel_gpu_acm_g12", "acm_g12")
.Case("intel_gpu_pvc", "pvc")
.Case("nvidia_gpu_sm_50", "sm_50")
.Case("nvidia_gpu_sm_52", "sm_52")
.Case("nvidia_gpu_sm_53", "sm_53")
.Case("nvidia_gpu_sm_60", "sm_60")
.Case("nvidia_gpu_sm_61", "sm_61")
.Case("nvidia_gpu_sm_62", "sm_62")
.Case("nvidia_gpu_sm_70", "sm_70")
.Case("nvidia_gpu_sm_72", "sm_72")
.Case("nvidia_gpu_sm_75", "sm_75")
.Case("nvidia_gpu_sm_80", "sm_80")
.Case("nvidia_gpu_sm_86", "sm_86")
.Case("nvidia_gpu_sm_87", "sm_87")
.Case("nvidia_gpu_sm_89", "sm_89")
.Case("nvidia_gpu_sm_90", "sm_90")
.Case("amd_gpu_gfx700", "gfx700")
.Case("amd_gpu_gfx701", "gfx701")
.Case("amd_gpu_gfx702", "gfx702")
.Case("amd_gpu_gfx801", "gfx801")
.Case("amd_gpu_gfx802", "gfx802")
.Case("amd_gpu_gfx803", "gfx803")
.Case("amd_gpu_gfx805", "gfx805")
.Case("amd_gpu_gfx810", "gfx810")
.Case("amd_gpu_gfx900", "gfx900")
.Case("amd_gpu_gfx902", "gfx902")
.Case("amd_gpu_gfx904", "gfx904")
.Case("amd_gpu_gfx906", "gfx906")
.Case("amd_gpu_gfx908", "gfx908")
.Case("amd_gpu_gfx90a", "gfx90a")
.Case("amd_gpu_gfx1010", "gfx1010")
.Case("amd_gpu_gfx1011", "gfx1011")
.Case("amd_gpu_gfx1012", "gfx1012")
.Case("amd_gpu_gfx1013", "gfx1013")
.Case("amd_gpu_gfx1030", "gfx1030")
.Case("amd_gpu_gfx1031", "gfx1031")
.Case("amd_gpu_gfx1032", "gfx1032")
.Case("amd_gpu_gfx1034", "gfx1034")
.Default("");
Device =
llvm::StringSwitch<StringRef>(DeviceName)
.Cases("intel_gpu_bdw", "intel_gpu_8_0_0", "bdw")
.Cases("intel_gpu_skl", "intel_gpu_9_0_9", "skl")
.Cases("intel_gpu_kbl", "intel_gpu_9_1_9", "kbl")
.Cases("intel_gpu_cfl", "intel_gpu_9_2_9", "cfl")
.Cases("intel_gpu_apl", "intel_gpu_bxt", "intel_gpu_9_3_0", "apl")
.Cases("intel_gpu_glk", "intel_gpu_9_4_0", "glk")
.Cases("intel_gpu_whl", "intel_gpu_9_5_0", "whl")
.Cases("intel_gpu_aml", "intel_gpu_9_6_0", "aml")
.Cases("intel_gpu_cml", "intel_gpu_9_7_0", "cml")
.Cases("intel_gpu_icllp", "intel_gpu_11_0_0", "icllp")
.Cases("intel_gpu_ehl", "intel_gpu_jsl", "ehl")
.Cases("intel_gpu_tgllp", "intel_gpu_12_0_0", "tgllp")
.Case("intel_gpu_rkl", "rkl")
.Cases("intel_gpu_adl_s", "intel_gpu_rpl_s", "adl_s")
.Case("intel_gpu_adl_p", "adl_p")
.Case("intel_gpu_adl_n", "adl_n")
.Cases("intel_gpu_dg1", "intel_gpu_12_10_0", "dg1")
.Cases("intel_gpu_acm_g10", "intel_gpu_dg2_g10", "acm_g10")
.Cases("intel_gpu_acm_g11", "intel_gpu_dg2_g11", "acm_g11")
.Cases("intel_gpu_acm_g12", "intel_gpu_dg2_g12", "acm_g12")
.Case("intel_gpu_pvc", "pvc")
.Case("nvidia_gpu_sm_50", "sm_50")
.Case("nvidia_gpu_sm_52", "sm_52")
.Case("nvidia_gpu_sm_53", "sm_53")
.Case("nvidia_gpu_sm_60", "sm_60")
.Case("nvidia_gpu_sm_61", "sm_61")
.Case("nvidia_gpu_sm_62", "sm_62")
.Case("nvidia_gpu_sm_70", "sm_70")
.Case("nvidia_gpu_sm_72", "sm_72")
.Case("nvidia_gpu_sm_75", "sm_75")
.Case("nvidia_gpu_sm_80", "sm_80")
.Case("nvidia_gpu_sm_86", "sm_86")
.Case("nvidia_gpu_sm_87", "sm_87")
.Case("nvidia_gpu_sm_89", "sm_89")
.Case("nvidia_gpu_sm_90", "sm_90")
.Case("amd_gpu_gfx700", "gfx700")
.Case("amd_gpu_gfx701", "gfx701")
.Case("amd_gpu_gfx702", "gfx702")
.Case("amd_gpu_gfx801", "gfx801")
.Case("amd_gpu_gfx802", "gfx802")
.Case("amd_gpu_gfx803", "gfx803")
.Case("amd_gpu_gfx805", "gfx805")
.Case("amd_gpu_gfx810", "gfx810")
.Case("amd_gpu_gfx900", "gfx900")
.Case("amd_gpu_gfx902", "gfx902")
.Case("amd_gpu_gfx904", "gfx904")
.Case("amd_gpu_gfx906", "gfx906")
.Case("amd_gpu_gfx908", "gfx908")
.Case("amd_gpu_gfx90a", "gfx90a")
.Case("amd_gpu_gfx1010", "gfx1010")
.Case("amd_gpu_gfx1011", "gfx1011")
.Case("amd_gpu_gfx1012", "gfx1012")
.Case("amd_gpu_gfx1013", "gfx1013")
.Case("amd_gpu_gfx1030", "gfx1030")
.Case("amd_gpu_gfx1031", "gfx1031")
.Case("amd_gpu_gfx1032", "gfx1032")
.Case("amd_gpu_gfx1034", "gfx1034")
.Default("");
return Device;
}

Expand All @@ -716,10 +717,10 @@ SmallString<64> SYCL::gen::getGenDeviceMacro(StringRef DeviceName) {
.Case("aml", "INTEL_GPU_AML")
.Case("cml", "INTEL_GPU_CML")
.Case("icllp", "INTEL_GPU_ICLLP")
.Case("ehl", "INTEL_GPU_EHL")
.Case("tgllp", "INTEL_GPU_TGLLP")
.Case("rkl", "INTEL_GPU_RKL")
.Case("adl_s", "INTEL_GPU_ADL_S")
.Case("rpl_s", "INTEL_GPU_RPL_S")
.Case("adl_p", "INTEL_GPU_ADL_P")
.Case("adl_n", "INTEL_GPU_ADL_N")
.Case("dg1", "INTEL_GPU_DG1")
Expand Down
19 changes: 17 additions & 2 deletions clang/test/Driver/sycl-oneapi-gpu.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,8 @@
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=apl -DMAC_STR=APL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_9_3_0 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=apl -DMAC_STR=APL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bxt -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=apl -DMAC_STR=APL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_glk -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=glk -DMAC_STR=GLK
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_9_4_0 -### %s 2>&1 | \
Expand All @@ -42,6 +44,10 @@
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_11_0_0 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=icllp \
// RUN: -DMAC_STR=ICLLP
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_ehl -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ehl -DMAC_STR=EHL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_jsl -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ehl -DMAC_STR=EHL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_tgllp -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=tgllp \
// RUN: -DMAC_STR=TGLLP
Expand All @@ -54,8 +60,8 @@
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=adl_s \
// RUN: -DMAC_STR=ADL_S
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_rpl_s -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=rpl_s \
// RUN: -DMAC_STR=RPL_S
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=adl_s \
// RUN: -DMAC_STR=ADL_S
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_adl_p -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=adl_p \
// RUN: -DMAC_STR=ADL_P
Expand All @@ -69,12 +75,21 @@
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_acm_g10 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g10 \
// RUN: -DMAC_STR=ACM_G10
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_dg2_g10 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g10 \
// RUN: -DMAC_STR=ACM_G10
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_acm_g11 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g11 \
// RUN: -DMAC_STR=ACM_G11
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_dg2_g11 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g11 \
// RUN: -DMAC_STR=ACM_G11
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_acm_g12 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g12 \
// RUN: -DMAC_STR=ACM_G12
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_dg2_g12 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g12 \
// RUN: -DMAC_STR=ACM_G12
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_pvc -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc -DMAC_STR=PVC
// MACRO: clang{{.*}} "-triple" "spir64_gen-unknown-unknown"
Expand Down
11 changes: 7 additions & 4 deletions sycl/doc/UsersManual.md
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Original file line number Diff line number Diff line change
Expand Up @@ -40,21 +40,24 @@ and not recommended to use in production environment.
support are accepted, providing a streamlined interface for AOT. Only one of
these values at a time is supported.
* intel_gpu_pvc - Ponte Vecchio Intel graphics architecture
* intel_gpu_acm_g12 - Alchemist G12 Intel graphics architecture
* intel_gpu_acm_g11 - Alchemist G11 Intel graphics architecture
* intel_gpu_acm_g10 - Alchemist G10 Intel graphics architecture
* intel_gpu_acm_g12, intel_gpu_dg2_g12 - Alchemist G12 Intel graphics architecture
* intel_gpu_acm_g11, intel_gpu_dg2_g11 - Alchemist G11 Intel graphics architecture
* intel_gpu_acm_g10, intel_gpu_dg2_g10 - Alchemist G10 Intel graphics architecture
* intel_gpu_dg1, intel_gpu_12_10_0 - DG1 Intel graphics architecture
* intel_gpu_adl_n - Alder Lake N Intel graphics architecture
* intel_gpu_adl_p - Alder Lake P Intel graphics architecture
* intel_gpu_rpl_s - Raptor Lake Intel graphics architecture
* intel_gpu_rpl_s - Raptor Lake Intel graphics architecture (equal to intel_gpu_adl_s)
* intel_gpu_adl_s - Alder Lake S Intel graphics architecture
* intel_gpu_rkl - Rocket Lake Intel graphics architecture
* intel_gpu_tgllp, intel_gpu_12_0_0 - Tiger Lake Intel graphics architecture
* intel_gpu_jsl - Jasper Lake Intel graphics architecture (equal to intel_gpu_ehl)
* intel_gpu_ehl - Elkhart Lake Intel graphics architecture
* intel_gpu_icllp, intel_gpu_11_0_0 - Ice Lake Intel graphics architecture
* intel_gpu_cml, intel_gpu_9_7_0 - Comet Lake Intel graphics architecture
* intel_gpu_aml, intel_gpu_9_6_0 - Amber Lake Intel graphics architecture
* intel_gpu_whl, intel_gpu_9_5_0 - Whiskey Lake Intel graphics architecture
* intel_gpu_glk, intel_gpu_9_4_0 - Gemini Lake Intel graphics architecture
* intel_gpu_bxt - Broxton Intel graphics architecture (equal to intel_gpu_apl)
* intel_gpu_apl, intel_gpu_9_3_0 - Apollo Lake Intel graphics architecture
* intel_gpu_cfl, intel_gpu_9_2_9 - Coffee Lake Intel graphics architecture
* intel_gpu_kbl, intel_gpu_9_1_9 - Kaby Lake Intel graphics architecture
Expand Down
6 changes: 6 additions & 0 deletions sycl/doc/extensions/experimental/sycl_ext_oneapi_device_architecture.asciidoc
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Original file line number Diff line number Diff line change
Expand Up @@ -104,11 +104,14 @@ enum class architecture : /* unspecified */ {
intel_gpu_kbl,
intel_gpu_cfl,
intel_gpu_apl,
intel_gpu_bxt = intel_gpu_apl,
intel_gpu_glk,
intel_gpu_whl,
intel_gpu_aml,
intel_gpu_cml,
intel_gpu_icllp,
intel_gpu_ehl,
intel_gpu_jsl = intel_gpu_ehl,
intel_gpu_tgllp,
intel_gpu_rkl,
intel_gpu_adl_s,
Expand All @@ -117,8 +120,11 @@ enum class architecture : /* unspecified */ {
intel_gpu_adl_n,
intel_gpu_dg1,
intel_gpu_acm_g10,
intel_gpu_dg2_g10 = intel_gpu_acm_g10,
intel_gpu_acm_g11,
intel_gpu_dg2_g11 = intel_gpu_acm_g11,
intel_gpu_acm_g12,
intel_gpu_dg2_g12 = intel_gpu_acm_g12,
intel_gpu_pvc,

nvidia_gpu_sm_50,
Expand Down
18 changes: 12 additions & 6 deletions sycl/include/sycl/ext/oneapi/experimental/device_architecture.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -21,11 +21,14 @@ enum class architecture {
intel_gpu_kbl,
intel_gpu_cfl,
intel_gpu_apl,
intel_gpu_bxt = intel_gpu_apl,
intel_gpu_glk,
intel_gpu_whl,
intel_gpu_aml,
intel_gpu_cml,
intel_gpu_icllp,
intel_gpu_ehl,
intel_gpu_jsl = intel_gpu_ehl,
intel_gpu_tgllp,
intel_gpu_rkl,
intel_gpu_adl_s,
Expand All @@ -34,8 +37,11 @@ enum class architecture {
intel_gpu_adl_n,
intel_gpu_dg1,
intel_gpu_acm_g10,
intel_gpu_dg2_g10 = intel_gpu_acm_g10,
intel_gpu_acm_g11,
intel_gpu_dg2_g11 = intel_gpu_acm_g11,
intel_gpu_acm_g12,
intel_gpu_dg2_g12 = intel_gpu_acm_g12,
intel_gpu_pvc,
// NVIDIA architectures
nvidia_gpu_sm_50,
Expand Down Expand Up @@ -130,6 +136,9 @@ static constexpr ext::oneapi::experimental::architecture max_architecture =
#ifndef __SYCL_TARGET_INTEL_GPU_ICLLP__
#define __SYCL_TARGET_INTEL_GPU_ICLLP__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_EHL__
#define __SYCL_TARGET_INTEL_GPU_EHL__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_TGLLP__
#define __SYCL_TARGET_INTEL_GPU_TGLLP__ 0
#endif
Expand All @@ -139,9 +148,6 @@ static constexpr ext::oneapi::experimental::architecture max_architecture =
#ifndef __SYCL_TARGET_INTEL_GPU_ADL_S__
#define __SYCL_TARGET_INTEL_GPU_ADL_S__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_RPL_S__
#define __SYCL_TARGET_INTEL_GPU_RPL_S__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_ADL_P__
#define __SYCL_TARGET_INTEL_GPU_ADL_P__ 0
#endif
Expand Down Expand Up @@ -289,10 +295,10 @@ static constexpr bool is_allowable_aot_mode =
(__SYCL_TARGET_INTEL_GPU_AML__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_CML__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ICLLP__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_EHL__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_TGLLP__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_RKL__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ADL_S__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_RPL_S__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ADL_P__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ADL_N__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_DG1__ == 1) ||
Expand Down Expand Up @@ -366,14 +372,14 @@ struct IsAOTForArchitectureClass {
__SYCL_TARGET_INTEL_GPU_CML__ == 1;
arr[static_cast<int>(arch::intel_gpu_icllp)] =
__SYCL_TARGET_INTEL_GPU_ICLLP__ == 1;
arr[static_cast<int>(arch::intel_gpu_ehl)] =
__SYCL_TARGET_INTEL_GPU_EHL__ == 1;
arr[static_cast<int>(arch::intel_gpu_tgllp)] =
__SYCL_TARGET_INTEL_GPU_TGLLP__ == 1;
arr[static_cast<int>(arch::intel_gpu_rkl)] =
__SYCL_TARGET_INTEL_GPU_RKL__ == 1;
arr[static_cast<int>(arch::intel_gpu_adl_s)] =
__SYCL_TARGET_INTEL_GPU_ADL_S__ == 1;
arr[static_cast<int>(arch::intel_gpu_rpl_s)] =
__SYCL_TARGET_INTEL_GPU_RPL_S__ == 1;
arr[static_cast<int>(arch::intel_gpu_adl_p)] =
__SYCL_TARGET_INTEL_GPU_ADL_P__ == 1;
arr[static_cast<int>(arch::intel_gpu_adl_n)] =
Expand Down
1 change: 1 addition & 0 deletions sycl/source/detail/device_info.hpp
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Expand Up @@ -601,6 +601,7 @@ struct get_device_info_impl<
{0x02418000, oneapi_exp_arch::intel_gpu_aml},
{0x0241c000, oneapi_exp_arch::intel_gpu_cml},
{0x02c00000, oneapi_exp_arch::intel_gpu_icllp},
{0x02c08000, oneapi_exp_arch::intel_gpu_ehl},
{0x03000000, oneapi_exp_arch::intel_gpu_tgllp},
{0x03004000, oneapi_exp_arch::intel_gpu_rkl},
{0x03008000, oneapi_exp_arch::intel_gpu_adl_s},
Expand Down