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[ESIMD][DOC][NFC] Deprecate DPAS type s1 and u1; clarify DPAS HW reqs #12412

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Merged
merged 4 commits into from
Jan 18, 2024

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DPAS API is not emulated. It is user's responsibility to manage device detection queries to avoid running DPAS on GPUs without XMX.

@v-klochkov v-klochkov requested a review from a team as a code owner January 17, 2024 01:03
DPAS API is not emulated. It is user's responsibility to manage device
detection queries to avoid running DPAS on GPUs without XMX.

Signed-off-by: Klochkov, Vyacheslav N <[email protected]>
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github-actions bot commented Jan 17, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

Signed-off-by: Klochkov, Vyacheslav N <[email protected]>
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LGTM just typo suggestions

Comment on lines 80 to 82
Explicit SIMD APIs can be used only in the code to be executed on Intel graphics
architecture devices. Attempt to run such code on other devices will result in
error.
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Explicit SIMD APIs can be used only in the code to be executed on Intel graphics
architecture devices. Attempt to run such code on other devices will result in
error.
Explicit SIMD APIs can be used only code that will be executed on Intel graphics
architecture devices. Attempting to run such code on other devices will result in an
error.

@@ -1119,6 +1126,22 @@ int main(void) {
more examples can be found in the
[ESIMD test suite](https://github.com/intel/llvm/tree/sycl/sycl/test-e2e/ESIMD) on github.

## Device queries and conditional dispatching of the code

ESIMD API provides the access to low level GPU hardware API. At the ESIMD program
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ESIMD API provides the access to low level GPU hardware API. At the ESIMD program
ESIMD API provides access to low level GPU hardware API. At ESIMD program


ESIMD API provides the access to low level GPU hardware API. At the ESIMD program
compilation time it is not known what target device is going to be used to run the program.
ESIMD programming model relies on user to manage the corresponding compile- and/or
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ESIMD programming model relies on user to manage the corresponding compile- and/or
The ESIMD programming model relies on the user to manage the corresponding compile- and/or

ESIMD API provides the access to low level GPU hardware API. At the ESIMD program
compilation time it is not known what target device is going to be used to run the program.
ESIMD programming model relies on user to manage the corresponding compile- and/or
runtime-checks that prevents ESIMD API from running on GPU that does not support such API.
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runtime-checks that prevents ESIMD API from running on GPU that does not support such API.
runtime-checks to prevent the ESIMD API from running on a GPU that does not support the API.

ESIMD programming model relies on user to manage the corresponding compile- and/or
runtime-checks that prevents ESIMD API from running on GPU that does not support such API.

One of the most trivial way to manage such checks is to have them on HOST. This variant
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One of the most trivial way to manage such checks is to have them on HOST. This variant
One of the most trivial ways to manage such checks is to have them on the HOST. This variant

includes a) calling device detect query to understand what device is being used
b) depending on the device run one or another version of the kernel.
For example, [this test](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_int.cpp#L8) is designed to be run on DG2 and PVC even though those two devices have
different `execution size`. This is done via usage of [device query on HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and subsequent
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different `execution size`. This is done via usage of [device query on HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and subsequent
different `execution sizes`. This is done via usage of [device query on HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and subsequent

includes a) calling device detect query to understand what device is being used
b) depending on the device run one or another version of the kernel.
For example, [this test](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_int.cpp#L8) is designed to be run on DG2 and PVC even though those two devices have
different `execution size`. This is done via usage of [device query on HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and subsequent
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Suggested change
different `execution size`. This is done via usage of [device query on HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and subsequent
different `execution size`. This is done via usage of [device query on the HOST](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/dpas/dpas_common.hpp#L430) and a subsequent

@v-klochkov v-klochkov merged commit d4f4f7c into intel:sycl Jan 18, 2024
@v-klochkov v-klochkov deleted the esimd_dpas_doc branch January 19, 2024 03:29
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2 participants