Skip to content

[SYCL][libclc][NATIVECPU] Implement generic atomic load for generic target #13249

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 7 commits into from
Apr 10, 2024
Merged

[SYCL][libclc][NATIVECPU] Implement generic atomic load for generic target #13249

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
3427c73
[wip] no addrspace in generic libclc
PietroGhg Mar 18, 2024
47bc9ff
Merge branch 'sycl' into pietro/atomic_load
PietroGhg Mar 26, 2024
6c9ab5b
Merge branch 'sycl' into pietro/atomic_load
PietroGhg Apr 2, 2024
f64cdae
Add impl for int
PietroGhg Apr 2, 2024
67c002f
add prefix in mangled as
PietroGhg Apr 2, 2024
f236865
use generic as in impl
PietroGhg Apr 3, 2024
a0c112d
formatting
PietroGhg Apr 10, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
37 changes: 19 additions & 18 deletions libclc/generic/libspirv/atomic/atomic_load.cl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,26 +13,27 @@
#define FDECL(TYPE, PREFIX, AS, BYTE_SIZE, MEM_ORDER) \
TYPE __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_##MEM_ORDER(volatile AS const TYPE *);

#define IMPL(TYPE, TYPE_MANGLED, AS, AS_MANGLED, PREFIX, BYTE_SIZE) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, unordered) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, acquire) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, seq_cst) \
_CLC_DEF TYPE \
_Z18__spirv_AtomicLoadPU3##AS_MANGLED##K##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
volatile AS const TYPE *p, enum Scope scope, \
enum MemorySemanticsMask semantics) { \
if (semantics & Acquire) { \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_acquire(p); \
} \
if (semantics & SequentiallyConsistent) { \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_seq_cst(p); \
} \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_unordered(p); \
#define IMPL(TYPE, TYPE_MANGLED, AS, AS_MANGLED, PREFIX, BYTE_SIZE) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, unordered) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, acquire) \
FDECL(TYPE, PREFIX, AS, BYTE_SIZE, seq_cst) \
_CLC_DEF TYPE \
_Z18__spirv_AtomicLoadP##AS_MANGLED##K##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Formatting looks like it could be improved - that \ should be aligned with the others

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I've aligned the \ at the end of the lines, thank you

volatile AS const TYPE *p, enum Scope scope, \
enum MemorySemanticsMask semantics) { \
if (semantics & Acquire) { \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_acquire(p); \
} \
if (semantics & SequentiallyConsistent) { \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_seq_cst(p); \
} \
return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_unordered(p); \
}

#define IMPL_AS(TYPE, TYPE_MANGLED, PREFIX, BYTE_SIZE) \
IMPL(TYPE, TYPE_MANGLED, global, AS1, PREFIX, BYTE_SIZE) \
IMPL(TYPE, TYPE_MANGLED, local, AS3, PREFIX, BYTE_SIZE)
#define IMPL_AS(TYPE, TYPE_MANGLED, PREFIX, BYTE_SIZE) \
IMPL(TYPE, TYPE_MANGLED, global, U3AS1, PREFIX, BYTE_SIZE) \
IMPL(TYPE, TYPE_MANGLED, local, U3AS3, PREFIX, BYTE_SIZE) \
IMPL(TYPE, TYPE_MANGLED, , , PREFIX, BYTE_SIZE)

IMPL_AS(int, i, , 4)
IMPL_AS(unsigned int, j, u, 4)
Expand Down
23 changes: 23 additions & 0 deletions libclc/generic/libspirv/atomic/loadstore_helpers_acquire.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,12 @@ entry:
unreachable
}

define i32 @__clc__atomic_load__4_acquire(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define i64 @__clc__atomic_load_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -32,6 +38,12 @@ entry:
unreachable
}

define i64 @__clc__atomic_load__8_acquire(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define i32 @__clc__atomic_uload_global_4_acquire(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(1)* %ptr acquire, align 4
Expand All @@ -44,6 +56,12 @@ entry:
unreachable
}

define i32 @__clc__atomic_uload__4_acquire(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(0)* %ptr acquire, align 4
ret i32 %0
}

define i64 @__clc__atomic_uload_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -56,3 +74,8 @@ entry:
unreachable
}

define i64 @__clc__atomic_uload__8_acquire(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}
24 changes: 24 additions & 0 deletions libclc/generic/libspirv/atomic/loadstore_helpers_release.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,12 @@ entry:
unreachable
}

define void @__clc__atomic_store__4_release(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_store_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -32,6 +38,12 @@ entry:
unreachable
}

define void @__clc__atomic_store__8_release(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_ustore_global_4_release(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -44,6 +56,12 @@ entry:
unreachable
}

define void @__clc__atomic_ustore__4_release(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_ustore_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -56,3 +74,9 @@ entry:
unreachable
}

define void @__clc__atomic_ustore__8_release(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

48 changes: 48 additions & 0 deletions libclc/generic/libspirv/atomic/loadstore_helpers_seq_cst.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,12 @@ entry:
unreachable
}

define i32 @__clc__atomic_load__4_seq_cst(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define i64 @__clc__atomic_load_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -32,6 +38,12 @@ entry:
unreachable
}

define i64 @__clc__atomic_load__8_seq_cst(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define i32 @__clc__atomic_uload_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(1)* %ptr seq_cst, align 4
Expand All @@ -44,6 +56,12 @@ entry:
unreachable
}

define i32 @__clc__atomic_uload__4_seq_cst(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define i64 @__clc__atomic_uload_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -56,6 +74,12 @@ entry:
unreachable
}

define i64 @__clc__atomic_uload__8_seq_cst(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_store_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -68,6 +92,12 @@ entry:
unreachable
}

define void @__clc__atomic_store__4_seq_cst(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_store_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -80,6 +110,12 @@ entry:
unreachable
}

define void @__clc__atomic_store__8_seq_cst(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_ustore_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -92,6 +128,12 @@ entry:
unreachable
}

define void @__clc__atomic_ustore__4_seq_cst(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_ustore_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
Expand All @@ -103,3 +145,9 @@ entry:
tail call void @llvm.trap()
unreachable
}

define void @__clc__atomic_ustore__8_seq_cst(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
tail call void @llvm.trap()
unreachable
}
48 changes: 48 additions & 0 deletions libclc/generic/libspirv/atomic/loadstore_helpers_unordered.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,12 @@ entry:
ret i32 %0
}

define i32 @__clc__atomic_load__4_unordered(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(0)* %ptr unordered, align 4
ret i32 %0
}

define i64 @__clc__atomic_load_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
Expand All @@ -32,6 +38,12 @@ entry:
ret i64 %0
}

define i64 @__clc__atomic_load__8_unordered(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i64, i64 addrspace(0)* %ptr unordered, align 8
ret i64 %0
}

define i32 @__clc__atomic_uload_global_4_unordered(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(1)* %ptr unordered, align 4
Expand All @@ -44,6 +56,12 @@ entry:
ret i32 %0
}

define i32 @__clc__atomic_uload__4_unordered(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i32, i32 addrspace(0)* %ptr unordered, align 4
ret i32 %0
}

define i64 @__clc__atomic_uload_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
Expand All @@ -56,6 +74,12 @@ entry:
ret i64 %0
}

define i64 @__clc__atomic_uload__8_unordered(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
entry:
%0 = load atomic volatile i64, i64 addrspace(0)* %ptr unordered, align 8
ret i64 %0
}

define void @__clc__atomic_store_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
Expand All @@ -68,6 +92,12 @@ entry:
ret void
}

define void @__clc__atomic_store__4_unordered(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
store atomic volatile i32 %value, i32 addrspace(0)* %ptr unordered, align 4
ret void
}

define void @__clc__atomic_store_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
Expand All @@ -80,6 +110,12 @@ entry:
ret void
}

define void @__clc__atomic_store__8_unordered(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
store atomic volatile i64 %value, i64 addrspace(0)* %ptr unordered, align 8
ret void
}

define void @__clc__atomic_ustore_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
Expand All @@ -92,6 +128,12 @@ entry:
ret void
}

define void @__clc__atomic_ustore__4_unordered(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
entry:
store atomic volatile i32 %value, i32 addrspace(0)* %ptr unordered, align 4
ret void
}

define void @__clc__atomic_ustore_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
Expand All @@ -104,3 +146,9 @@ entry:
ret void
}

define void @__clc__atomic_ustore__8_unordered(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
entry:
store atomic volatile i64 %value, i64 addrspace(0)* %ptr unordered, align 8
ret void
}