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[Driver][SYCL][FPGA] Update dependency file handling for -fintelfpga #1664

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Merged
merged 3 commits into from
May 13, 2020

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mdtoguchi
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When generating dependency files for FPGA, create to a temporary file instead
of a CWD file based on the input source.

Signed-off-by: Michael D Toguchi [email protected]

When generating dependency files for FPGA, create to a temporary file instead
of a CWD file based on the input source.

Signed-off-by: Michael D Toguchi <[email protected]>
@mdtoguchi mdtoguchi requested a review from AGindinson as a code owner May 9, 2020 05:24
@mdtoguchi mdtoguchi requested a review from meiyacha May 9, 2020 05:28
Add multi source dependency file test
Perform checking when grabbing dep file from map
Other misc cleanup

Signed-off-by: Michael D Toguchi <[email protected]>
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LGTM!

@bader bader requested a review from meiyacha May 13, 2020 11:07
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Looks good to me :)!

@bader bader merged commit 7df381a into intel:sycl May 13, 2020
preethi-intel pushed a commit to preethi-intel/llvm that referenced this pull request Oct 26, 2022
It can be generated via #pragma clang unroll(full) pragma.
llvm.loop.unroll.full means attempt to do full unroll of the
loop and disable the unrolling if the trip count is not known
at compile time.

Unroll mask to which it was previously mapped doesn't much the
description.

The way the patch represents it in SPIR-V is:
 Unroll mask + PartialCount mask with '1' parameter

This patch also removes some overtesting for unroll metadata.

Signed-off-by: Sidorov, Dmitry <[email protected]>

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@eed0081
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4 participants