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Merged
merged 12 commits into from
May 22, 2025

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AlexeySachkov
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Some general comments: a new structure is used this time. We have less top-level categories, but more sub-categories which group items based on some feature/activity/area.

Motivation for that is because "Improvements & Bug Fixes -> Feature Name" is expected to be more interesting and useful for an end user, than a one huge list of Bug Fixes for everything.

We still have some kind of fallback section "all other bugfixes", but at least it is not that huge.

Any feedback on the new structure is appreciated

@AlexeySachkov AlexeySachkov marked this pull request as ready for review May 14, 2025 16:49
@AlexeySachkov AlexeySachkov requested review from tfzhu and a team as code owners May 14, 2025 16:49
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General CUDA/HIP entries LGTM

@dm-vodopyanov
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@intel/dpcpp-doc-reviewers, friendly ping. We need a review as soon as possible, thanks

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Other changes in SYCL Compiler section LGTM. Let me know if you need me (intel/dpcpp-tools-reviewers) to take a look at any other section.

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Joint matrix note LGTM

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esimd lgtm

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Section on KHRs looks good.

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Some notes to add for Bindless Images

@@ -349,8 +349,6 @@ SYCL runtime over low-level runtimes (such as Level Zero or OpenCL):
- Removed a busy-wait loop from the implementation of
`-fsycl-max-parallel-link-jobs` flag, making it consume less resources when
waiting. intel/llvm#17260
- Made `-O0` to be the default optimization level when debug info is enabled
through `-g` flag. intel/llvm#16408
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@dm-vodopyanov, title of this PR states March. This change was reverted in April - will the revert be part of this release?

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@mdtoguchi yes, the revert will be present in Mar'25 release, as we currently align open-source releases with closed-source oneAPI releases. Upcoming oneAPI release have this revert, so upcoming open-source release will have cherry-pick of this revert.
Tagging @KornevNikita who is working on open-source releases, for awareness.

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UR LGTM

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LGTM. SYCL Graph related notes.

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Added syclcompat suggestions, but looks good

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The Native CPU sections look good to me. 👍
I've made a minor suggestion to mention two more PRs as improvements, feel free to ignore these if you think they don't need to be added.

Comment on lines 228 to 238
- ada16682e8c3 [DevASAN] Only report warning if passing host ptr to kernel (#16654)
- seems like a potentially important bugfix
- ce4a320806b2 [DeivceASAN] Make ShadowMemory one instance per type (#16687)
- seems like some kind of bugfix
- ef4d66af3b74 [DeviceSAN] Fix kernel name addressspace (#16425)
- 1fba00d3be7d [DeviceASAN] Fix ASAN with kernel assert (#16256)
- 34aeabab551e [SYCL][DeviceASAN] Fix AcceeChain to a matrix for bfloat16 (#16323)
- 6f3b0e857d15 [DevASAN] Do allocation with USM pool to reduce memory overhead (#16280)
- a8c6e7715be2 [DeviceASAN] Re-use shadow if required size is not larger than last one (#16258)
- As the above, some optimization of memory usage by ASAN?
- 201725664cc5 [DeviceSanitizer] Fix device global type of KernelMetadata (#16357)
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change them to the following:

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@dm-vodopyanov dm-vodopyanov May 21, 2025

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@cdai2 - can this be more descriptive and useful for customers? Using PR titles "as-is" is not enough.
BTW, if you see that something is not user-visible or not worth mentioning for customers, that can be also removed.

As an example, "Fix kernel name addressspace #16425" is not descriptive. I would say it should be something like this: "Fixed an error in SPIR-V module caused by incorrect casting from private/local/global address space to global address space. Such casting is not allowed. #16425"

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BTW, if you see that something is not user-visible or not worth mentioning for customers, that can be also removed.

Applied suggestion https://github.com/intel/llvm/pull/18469/files#r2099140914 from @yingcong-wu in 1079097

@intel/dpcpp-sanitizers-review @yingcong-wu @cdai2, please, review one more time

Comment on lines +65 to +78
- [`sycl_ext_oneapi_kernel_compiler`](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc)
extension specification was updated to accept `sycl` as source language, thus
providing functionality similar to
[NVRTC](https://docs.nvidia.com/cuda/nvrtc/). intel/llvm#11985,
intel/llvm#17446
- Initial support for this feature was implemented. intel/llvm#16132,
intel/llvm#16222, intel/llvm#16132, intel/llvm#17640, intel/llvm#17356,
intel/llvm#16565, intel/llvm#17383, intel/llvm#17447, intel/llvm#17307,
intel/llvm#17373, intel/llvm#17331, intel/llvm#17329, intel/llvm#17266,
intel/llvm#17032, intel/llvm#16823, intel/llvm#16702, intel/llvm#16638,
intel/llvm#16316, intel/llvm#17359, intel/llvm#16485, intel/llvm#16821
- Known issues and limitations are documented
[in the extension specification](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc#known-issues-and-limitations-when-the-language-is-sycl). intel/llvm#17307,
intel/llvm#17459
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Suggested change
- [`sycl_ext_oneapi_kernel_compiler`](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc)
extension specification was updated to accept `sycl` as source language, thus
providing functionality similar to
[NVRTC](https://docs.nvidia.com/cuda/nvrtc/). intel/llvm#11985,
intel/llvm#17446
- Initial support for this feature was implemented. intel/llvm#16132,
intel/llvm#16222, intel/llvm#16132, intel/llvm#17640, intel/llvm#17356,
intel/llvm#16565, intel/llvm#17383, intel/llvm#17447, intel/llvm#17307,
intel/llvm#17373, intel/llvm#17331, intel/llvm#17329, intel/llvm#17266,
intel/llvm#17032, intel/llvm#16823, intel/llvm#16702, intel/llvm#16638,
intel/llvm#16316, intel/llvm#17359, intel/llvm#16485, intel/llvm#16821
- Known issues and limitations are documented
[in the extension specification](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc#known-issues-and-limitations-when-the-language-is-sycl). intel/llvm#17307,
intel/llvm#17459
DPCPP gained support for runtime compilation of SYCL source code via the
[`sycl_ext_oneapi_kernel_compiler`](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc)
extension. SYCL applications and libraries can now define new kernels from a
source string as a powerful new means for runtime specialization. This feature
is built on top of a new in-memory compilation pipeline implemented in the
SYCL-JIT library.
[Known issues and limitations](https://github.com/intel/llvm/blob/b23d69e2c3fda1d69351137991897c96bf6a586d/sycl/doc/extensions/experimental/sycl_ext_oneapi_kernel_compiler.asciidoc#known-issues-and-limitations-when-the-language-is-sycl)
are documented in the extension specification. See also the companion technical
presentation, "Fast In-Memory Runtime Compilation of SYCL Code", at IWOCL 2025
([slides](https://www.iwocl.org/wp-content/uploads/iwocl-2025-julian-oppermann-fast-in-memory-runtime.pdf),
[recording](https://youtu.be/X9mS8xetZJY)).
**Notable changes:**
- Updated `sycl_ext_oneapi_kernel_compiler` extension specification to accept
`sycl` as source language. intel/llvm#11985
- Aligned handling of normal and runtime-compiled kernels. intel/llvm#16316
- Allowed kernels to be queried by their (unmangled) source code name.
intel/llvm#16485 intel/llvm#16821 intel/llvm#17032
- Implemented persistent cache for the frontend invocation. intel/llvm#16823
- Clarified handling of include search paths. intel/llvm#17307
- Made the JIT-based, in-memory pipeline the default compiler for the `sycl`
source language. intel/llvm#17383
**Supplementary PRs**
intel/llvm#16132, intel/llvm#16222, intel/llvm#16243, intel/llvm#16565,
intel/llvm#16638, intel/llvm#16685, intel/llvm#16702, intel/llvm#17131,
intel/llvm#17182, intel/llvm#17208, intel/llvm#17266, intel/llvm#17329,
intel/llvm#17331, intel/llvm#17356, intel/llvm#17373, intel/llvm#17405,
intel/llvm#17447, intel/llvm#17459, intel/llvm#17460

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Thanks Julian! I've already applied your feedback in accordance to overall style and level of details of release notes

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Bindless Images and SYCLcompat LGTM

@dm-vodopyanov
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@intel/dpcpp-doc-reviewers @steffenlarsen @tfzhu - tagging all code owners. We are currently waiting for a review from @intel/dpcpp-sanitizers-review, meanwhile, could you please review the entire patch to speed-up merging?

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@intel/dpcpp-doc-reviewers @steffenlarsen @tfzhu - this is ready for review

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LGTM!

@dm-vodopyanov dm-vodopyanov merged commit 4438a4b into intel:sycl May 22, 2025
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