[SYCL] Add BMG G31 and WCL to sycl_ext_oneapi_device_architecture

clang/lib/Driver/ToolChains/SYCL.cpp

@@ -1250,9 +1250,11 @@ StringRef SYCL::gen::resolveGenDevice(StringRef DeviceName) {
           .Cases("intel_gpu_mtl_h", "intel_gpu_12_71_4", "mtl_h")
           .Cases("intel_gpu_arl_h", "intel_gpu_12_74_4", "arl_h")
           .Cases("intel_gpu_bmg_g21", "intel_gpu_20_1_4", "bmg_g21")
+          .Cases("intel_gpu_bmg_g31", "intel_gpu_20_2_0", "bmg_g31")
           .Cases("intel_gpu_lnl_m", "intel_gpu_20_4_4", "lnl_m")
           .Cases("intel_gpu_ptl_h", "intel_gpu_30_0_4", "ptl_h")
           .Cases("intel_gpu_ptl_u", "intel_gpu_30_1_1", "ptl_u")
+          .Cases("intel_gpu_wcl", "intel_gpu_30_3_0", "wcl")
           .Case("nvidia_gpu_sm_50", "sm_50")
           .Case("nvidia_gpu_sm_52", "sm_52")
           .Case("nvidia_gpu_sm_53", "sm_53")
@@ -1342,9 +1344,11 @@ SmallString<64> SYCL::gen::getGenDeviceMacro(StringRef DeviceName) {
                       .Case("mtl_h", "INTEL_GPU_MTL_H")
                       .Case("arl_h", "INTEL_GPU_ARL_H")
                       .Case("bmg_g21", "INTEL_GPU_BMG_G21")
+                      .Case("bmg_g31", "INTEL_GPU_BMG_G31")
                       .Case("lnl_m", "INTEL_GPU_LNL_M")
                       .Case("ptl_h", "INTEL_GPU_PTL_H")
                       .Case("ptl_u", "INTEL_GPU_PTL_U")
+                      .Case("wcl", "INTEL_GPU_WCL")
                       .Case("sm_50", "NVIDIA_GPU_SM_50")
                       .Case("sm_52", "NVIDIA_GPU_SM_52")
                       .Case("sm_53", "NVIDIA_GPU_SM_53")

clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp

@@ -148,6 +148,10 @@
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_1_4 -### %s 2>&1 | \
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21
+// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bmg_g31 -### %s 2>&1 | \
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g31 -DMAC_STR=BMG_G31
+// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_2_0 -### %s 2>&1 | \
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g31 -DMAC_STR=BMG_G31
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_lnl_m -### %s 2>&1 | \
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=lnl_m -DMAC_STR=LNL_M
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_4_4 -### %s 2>&1 | \
@@ -160,6 +164,10 @@
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl_u -DMAC_STR=PTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_30_1_1 -### %s 2>&1 | \
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl_u -DMAC_STR=PTL_U
+// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_wcl -### %s 2>&1 | \
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=wcl -DMAC_STR=WCL
+// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_30_3_0 -### %s 2>&1 | \
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=wcl -DMAC_STR=WCL
 // MACRO: clang{{.*}} "-triple" "spir64_gen-unknown-unknown"
 // MACRO: "-D__SYCL_TARGET_INTEL_GPU_[[MAC_STR]]__"
 // MACRO: clang{{.*}} "-fsycl-is-host"

llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td

@@ -220,9 +220,11 @@ class IntelTargetInfo<string Name, list<Aspect> Aspects, list<int> subGroupSizes
 // sizes to be 16 and 32, which corresponds to PVC having 16 and 32 
 // as sub-group sizes the supported sub-group sizes. 
 
+def : IntelTargetInfo<"intel_gpu_wcl", Fp16Fp64Atomic64, Sg16_32>;
 def : IntelTargetInfo<"intel_gpu_ptl_u", Fp16Fp64Atomic64, Sg16_32>;
 def : IntelTargetInfo<"intel_gpu_ptl_h", Fp16Fp64Atomic64, Sg16_32>;
 def : IntelTargetInfo<"intel_gpu_lnl_m", Fp16Fp64Atomic64, Sg16_32>;
+def : IntelTargetInfo<"intel_gpu_bmg_g31", Fp16Fp64Atomic64, Sg16_32>;
 def : IntelTargetInfo<"intel_gpu_bmg_g21", Fp16Fp64Atomic64, Sg16_32>;
 def : IntelTargetInfo<"intel_gpu_arl_h", Fp16Fp64Atomic64, Sg8_16_32>;
 def : IntelTargetInfo<"intel_gpu_mtl_h", Fp16Fp64Atomic64, Sg8_16_32>;

sycl/doc/UsersManual.md

@@ -47,9 +47,11 @@ and not recommended to use in production environment.
     Special target values specific to Intel, NVIDIA and AMD Processor Graphics
     support are accepted, providing a streamlined interface for AOT.
     A comma-separated list of valid Intel, NVIDIA and AMD Processor Graphics values are supported.
+    * intel_gpu_wcl, intel_gpu_30_3_0 - Wildcat Lake Intel graphics architecture
     * intel_gpu_ptl_u, intel_gpu_30_1_1 - Panther Lake U Intel graphics architecture
     * intel_gpu_ptl_h, intel_gpu_30_0_4 - Panther Lake H Intel graphics architecture
     * intel_gpu_lnl_m, intel_gpu_20_4_4 - Lunar Lake Intel graphics architecture
+    * intel_gpu_bmg_g31, intel_gpu_20_2_0 - Battlemage G31 Intel graphics architecture
     * intel_gpu_bmg_g21, intel_gpu_20_1_4 - Battlemage G21 Intel graphics architecture
     * intel_gpu_arl_h, intel_gpu_12_74_4 - Arrow Lake H Intel graphics architecture
     * intel_gpu_mtl_h, intel_gpu_12_71_4 - Meteor Lake H Intel graphics architecture

sycl/doc/extensions/experimental/sycl_ext_oneapi_device_architecture.asciidoc

@@ -397,6 +397,14 @@ intel_gpu_bmg_g21
 |-
 |Battlemage G21 Intel graphics architecture.
 
+a|
+[source]
+----
+intel_gpu_bmg_g31
+----
+|-
+|Battlemage G31 Intel graphics architecture.
+
 a|
 [source]
 ----
@@ -421,6 +429,14 @@ intel_gpu_ptl_u
 |-
 |Panther Lake U Intel graphics architecture.
 
+a|
+[source]
+----
+intel_gpu_wcl
+----
+|-
+|Wildcat Lake Intel graphics architecture.
+
 a|
 [source]
 ----
@@ -450,9 +466,11 @@ intel_gpu_12_70_4 = intel_gpu_mtl_u
 intel_gpu_12_71_4 = intel_gpu_mtl_h
 intel_gpu_12_74_4 = intel_gpu_arl_h
 intel_gpu_20_1_4 = intel_gpu_bmg_g21
+intel_gpu_20_2_0 = intel_gpu_bmg_g31
 intel_gpu_20_4_4 = intel_gpu_lnl_m
 intel_gpu_30_0_4 = intel_gpu_ptl_h
 intel_gpu_30_1_1 = intel_gpu_ptl_u
+intel_gpu_30_3_0 = intel_gpu_wcl
 ----
 |-
 |Aliases for Intel graphics architectures.

sycl/include/sycl/ext/oneapi/experimental/device_architecture.def

@@ -73,9 +73,11 @@ __SYCL_ARCHITECTURE_ALIAS(intel_gpu_arl_s, intel_gpu_mtl_u)      // Arrow Lake S
 __SYCL_ARCHITECTURE(intel_gpu_mtl_h, 0x0000000311c00400)         // Meteor Lake H
 __SYCL_ARCHITECTURE(intel_gpu_arl_h, 0x0000000312800400)         // Arrow Lake H
 __SYCL_ARCHITECTURE(intel_gpu_bmg_g21, 0x0000000500400400)       // Battlemage G21
+__SYCL_ARCHITECTURE(intel_gpu_bmg_g31, 0x0000000500800000)       // Battlemage G31
 __SYCL_ARCHITECTURE(intel_gpu_lnl_m, 0x0000000501000400)         // Lunar Lake
 __SYCL_ARCHITECTURE(intel_gpu_ptl_h, 0x0000000780000400)         // Panther Lake H
 __SYCL_ARCHITECTURE(intel_gpu_ptl_u, 0x0000000780400100)         // Panther Lake U
+__SYCL_ARCHITECTURE(intel_gpu_wcl, 0x0000000780c00000)           // Wildcat Lake
 //
 // NVIDIA architectures
 //
@@ -171,6 +173,8 @@ __SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_70_4, intel_gpu_mtl_u)
 __SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_71_4, intel_gpu_mtl_h)
 __SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_74_4, intel_gpu_arl_h)
 __SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_1_4, intel_gpu_bmg_g21)
+__SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_2_0, intel_gpu_bmg_g31)
 __SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_4_4, intel_gpu_lnl_m)
 __SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_0_4, intel_gpu_ptl_h)
-__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_1_1, intel_gpu_ptl_u)
+__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_1_1, intel_gpu_ptl_u)
+__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_3_0, intel_gpu_wcl)

sycl/include/sycl/ext/oneapi/experimental/device_architecture.hpp

@@ -72,7 +72,7 @@ static constexpr ext::oneapi::experimental::architecture
         ext::oneapi::experimental::architecture::intel_gpu_bdw;
 static constexpr ext::oneapi::experimental::architecture
     max_intel_gpu_architecture =
-        ext::oneapi::experimental::architecture::intel_gpu_ptl_u;
+        ext::oneapi::experimental::architecture::intel_gpu_wcl;
 
 static constexpr ext::oneapi::experimental::architecture
     min_nvidia_gpu_architecture =
@@ -169,6 +169,9 @@ static constexpr ext::oneapi::experimental::architecture
 #ifndef __SYCL_TARGET_INTEL_GPU_BMG_G21__
 #define __SYCL_TARGET_INTEL_GPU_BMG_G21__ 0
 #endif
+#ifndef __SYCL_TARGET_INTEL_GPU_BMG_G31__
+#define __SYCL_TARGET_INTEL_GPU_BMG_G31__ 0
+#endif
 #ifndef __SYCL_TARGET_INTEL_GPU_LNL_M__
 #define __SYCL_TARGET_INTEL_GPU_LNL_M__ 0
 #endif
@@ -178,6 +181,9 @@ static constexpr ext::oneapi::experimental::architecture
 #ifndef __SYCL_TARGET_INTEL_GPU_PTL_U__
 #define __SYCL_TARGET_INTEL_GPU_PTL_U__ 0
 #endif
+#ifndef __SYCL_TARGET_INTEL_GPU_WCL__
+#define __SYCL_TARGET_INTEL_GPU_WCL__ 0
+#endif
 #ifndef __SYCL_TARGET_NVIDIA_GPU_SM_50__
 #define __SYCL_TARGET_NVIDIA_GPU_SM_50__ 0
 #endif
@@ -377,9 +383,11 @@ static constexpr bool is_allowable_aot_mode =
     (__SYCL_TARGET_INTEL_GPU_MTL_H__ == 1) ||
     (__SYCL_TARGET_INTEL_GPU_ARL_H__ == 1) ||
     (__SYCL_TARGET_INTEL_GPU_BMG_G21__ == 1) ||
+    (__SYCL_TARGET_INTEL_GPU_BMG_G31__ == 1) ||
     (__SYCL_TARGET_INTEL_GPU_LNL_M__ == 1) ||
     (__SYCL_TARGET_INTEL_GPU_PTL_H__ == 1) ||
     (__SYCL_TARGET_INTEL_GPU_PTL_U__ == 1) ||
+    (__SYCL_TARGET_INTEL_GPU_WCL__ == 1) ||
     (__SYCL_TARGET_NVIDIA_GPU_SM_50__ == 1) ||
     (__SYCL_TARGET_NVIDIA_GPU_SM_52__ == 1) ||
     (__SYCL_TARGET_NVIDIA_GPU_SM_53__ == 1) ||
@@ -524,6 +532,9 @@ get_current_architecture_aot() {
 #if __SYCL_TARGET_INTEL_GPU_BMG_G21__
   return ext::oneapi::experimental::architecture::intel_gpu_bmg_g21;
 #endif
+#if __SYCL_TARGET_INTEL_GPU_BMG_G31__
+  return ext::oneapi::experimental::architecture::intel_gpu_bmg_g31;
+#endif
 #if __SYCL_TARGET_INTEL_GPU_LNL_M__
   return ext::oneapi::experimental::architecture::intel_gpu_lnl_m;
 #endif
@@ -533,6 +544,9 @@ get_current_architecture_aot() {
 #if __SYCL_TARGET_INTEL_GPU_PTL_U__
   return ext::oneapi::experimental::architecture::intel_gpu_ptl_u;
 #endif
+#if __SYCL_TARGET_INTEL_GPU_WCL__
+  return ext::oneapi::experimental::architecture::intel_gpu_wcl;
+#endif
 #if __SYCL_TARGET_NVIDIA_GPU_SM_50__
   return ext::oneapi::experimental::architecture::nvidia_gpu_sm_50;
 #endif

sycl/source/detail/device_impl.hpp

@@ -1821,13 +1821,15 @@ class device_impl : public std::enable_shared_from_this<device_impl> {
         {0x05004000, oneapi_exp_arch::intel_gpu_bmg_g21}, // A0
         {0x05004001, oneapi_exp_arch::intel_gpu_bmg_g21}, // A1
         {0x05004004, oneapi_exp_arch::intel_gpu_bmg_g21}, // B0
+        {0x05008000, oneapi_exp_arch::intel_gpu_bmg_g31}, // A0
         {0x05010000, oneapi_exp_arch::intel_gpu_lnl_m},   // A0
         {0x05010001, oneapi_exp_arch::intel_gpu_lnl_m},   // A1
         {0x05010004, oneapi_exp_arch::intel_gpu_lnl_m},   // B0
         {0x07800000, oneapi_exp_arch::intel_gpu_ptl_h},   // A0
         {0x07800004, oneapi_exp_arch::intel_gpu_ptl_h},   // B0
         {0x07804000, oneapi_exp_arch::intel_gpu_ptl_u},   // A0
         {0x07804001, oneapi_exp_arch::intel_gpu_ptl_u},   // A1
+        {0x0780c000, oneapi_exp_arch::intel_gpu_wcl},     // A0
     };
 
     // Only for Intel CPU architectures