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[SYCL][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0 #2409
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vladimirlaz
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intel:sycl
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yanfeng3721:level_zero_v1_with_new_GPU
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[SYCL][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0 #2409
vladimirlaz
merged 9 commits into
intel:sycl
from
yanfeng3721:level_zero_v1_with_new_GPU
Sep 4, 2020
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- Added caching of L0 command lists per pi device - Command list created with an associated fence to track when the command list has successfully executed by the command queue - Added SYCL_PI_LEVEL0_MAX_COMMAND_LIST_CACHE environment variable to set the maximum cache size (default: 20000)
- Fixed issue where command list reuse between queues failed to properly add a new fence to the map. Signed-off-by: Spruit, Neil R <[email protected]> Signed-off-by: Byoungro So <[email protected]>
Add temporary support to enable online linking with the Level Zero driver if the SYCL_ENABLE_LEVEL_ZERO_LINK environment variable is set. At the time this code was written, the Level Zero driver online linking APIs exist, but they don't work. We think the DPC++ runtime support is ready, though, and we can enable it via this environment variable. This will allow testing with a new driver if one is available before the next DPC++ release.
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Please address review comments
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vladimirlaz
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This was referenced Sep 4, 2020
kbenzie
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…ormTests Enable platform CTS tests to run on all available platforms.
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Enable platform CTS tests to run on all available platforms.
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Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0. The PR is used for test, please do not merge.