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[SYCL][ESIMD] Fixed compiler crash in LowerESIMDVecArg pass #2556

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DenisBakhvalov
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This fixes potential compiler crash in LowerESIMDVecArg pass, which I encountered while writing a small test. Just to be clear, this doesn't happen in a real test, but potentially could happen.

The problem arises when Global is used in simple instruction, not directly in ConstantExpr, e.g.:

@GlobalGRF_data = dso_local global %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd" undef, align 16384
   
define void @no_crash(<2512 x i32> %simd_val) {
     %cast = addrspacecast %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd"* @GlobalGRF_data to %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd" addrspace(4)*
     ...
}

It crashed in ESIMDLowerVecArgPass::createNewConstantExpr.

@DenisBakhvalov
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Please review only the last commit (4af5997)

@DenisBakhvalov DenisBakhvalov added the esimd Explicit SIMD feature label Sep 28, 2020
@DenisBakhvalov DenisBakhvalov force-pushed the private/dbakhval-esimd-globals-crash branch from 4af5997 to ec3f445 Compare September 28, 2020 19:26
bader
bader previously approved these changes Sep 30, 2020
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ec3f4453da609a53537ebfcc1b9ba095751b1f64 looks good to me.

This fixes potential compiler crash in LowerESIMDVecArg pass, which I encountered while writing a small test. Just to be clear, this doesn't happen in a real test, but potentially could happen.

The problem arises when Global is used in simple instruction, not directly in ConstantExpr, e.g.:

```
@GlobalGRF_data = dso_local global %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd" undef, align 16384

define void @no_crash(<2512 x i32> %simd_val) {
  %cast = addrspacecast %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd"* @GlobalGRF_data to %"class._ZTSN2cl4sycl5INTEL3gpu4simdIiLi2512EEE.cl::sycl::INTEL::gpu::simd" addrspace(4)*
  ...
}
```

It crashed in `ESIMDLowerVecArgPass::createNewConstantExpr`.
@bader bader merged commit 73e957f into intel:sycl Oct 5, 2020
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Oct 7, 2020
* sycl:
  [SYCL] Fix test failure due to size discrepancy in 32 and 64 bit environment (intel#2594)
  [BuildBot] Linux GPU driver uplift to 20.39.17972 (intel#2600)
  [SYCL][NFC] Remove cyclic dependency in headers (intel#2601)
  [SYCL][Doc] Fix Sphinx docs index (intel#2599)
  [SYCL][PI][L0] Add an assert to piEnqueueKernelLaunch() when the GlobalWorkOffset!=0 (intel#2593)
  [SYCL][Driver] Turn on -spirv-allow-extra-diexpressions option (intel#2578)
  [SYCL] Serialize queue related PI API in the Level-Zero plugin (intel#2588)
  Added missing math APIs for devicelib. (intel#2558)
  [SYCL][DOC] Fix path to FPGA device selector (intel#2563)
  [SYCL][CUDA] Add basic sub-group functionality (intel#2587)
  [SYCL] Add specialization constant feature design doc. (intel#2572)
  [SYCL] Expand release lit test to CPU and ACC (intel#2589)
  [SYCL] Add clang support for FPGA kernel attribute scheduler_target_fmax_mhz (intel#2511)
  [SYCL][ESIMD] Fixed compiler crash in LowerESIMDVecArg pass (intel#2556)
kbenzie pushed a commit to kbenzie/intel-llvm that referenced this pull request Feb 17, 2025
Chenyang-L pushed a commit that referenced this pull request Feb 18, 2025
Fix error returns of urUSMHostAlloc
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3 participants