Skip to content

[SYCL][L0] Add SubDevices into the device cache #3314

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Merged
merged 8 commits into from
Mar 11, 2021
Merged

[SYCL][L0] Add SubDevices into the device cache #3314

merged 8 commits into from
Mar 11, 2021

Conversation

bso-intel
Copy link
Contributor

This PR adds the missing sub-devices in the device cache.
This fixes the missing cache loopup for sub-devices.

Signed-off-by: Byoungro So [email protected]

bso-intel added 3 commits March 5, 2021 14:02
@bso-intel
[SYCL][L0] Add SubDevices into the device cache
1e1ac37 
This PR adds the missing sub-devices in the device cache.
This fixes the missing cache loopup for sub-devices.

Signed-off-by: Byoungro So <[email protected]>
@bso-intel
Merge remote-tracking branch 'upstream/sycl' into subdevice-cache
281d1e4
@bso-intel
limit the guard_lock to avoid deadlock
10a8db9 
Signed-off-by: Byoungro So <[email protected]>
bso-intel
bso-intel commented Mar 6, 2021
View reviewed changes
@bso-intel bso-intel marked this pull request as ready for review March 9, 2021 02:31
@bso-intel bso-intel requested a review from smaslov-intel as a code owner March 9, 2021 02:31
smaslov-intel
smaslov-intel suggested changes Mar 9, 2021
View reviewed changes
smaslov-intel
smaslov-intel suggested changes Mar 10, 2021
View reviewed changes
smaslov-intel
smaslov-intel previously approved these changes Mar 10, 2021
View reviewed changes
Copy link
Contributor

@smaslov-intel smaslov-intel left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM, remember to add test

@bso-intel
Copy link
Contributor Author

It seems the failure FAIL: Clang::intel-fpga-global-const.cpp is not related to my changeset.
I cannot reproduce the issue locally.
Some other PRs also show the same issue.

@bso-intel
added another retain
6908294 
Signed-off-by: Byoungro So <[email protected]>
smaslov-intel
smaslov-intel approved these changes Mar 11, 2021
View reviewed changes
Copy link
Contributor

@smaslov-intel smaslov-intel left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM

@bso-intel
Copy link
Contributor Author

I tried to rerun 5 times today, and FAIL: Clang::intel-fpga-global-const.cpp is persistent today.
I am pretty sure this failure is not related to my changset.
I cannot reproduce the failure on my local machine, this failure started from the last 2 commits which are limited to Level Zero, but it complains that -fsycl is unknown argument.

@bader
I looked at other PR like #3315 also suffers from this particular test case failure.
Could you help resolve this issue?

@bader
Copy link
Contributor

bader commented Mar 11, 2021

It looks like we have a conflicts between a539197 and f32c431. I'll try to fix this issue..
@smanna12, @AaronBallman, FYI.

@bader
Copy link
Contributor

bader commented Mar 11, 2021

I hope #3339 addresses the problem with clang/test/SemaSYCL/intel-fpga-global-const.cpp.

@bso-intel
Copy link
Contributor Author

Thanks a lot, @bader .
I am waiting for your PR to get resolved.

@bader
Copy link
Contributor

bader commented Mar 11, 2021

I'll restart buildbot tests in this PR after #3339 is merged.

@bso-intel
Copy link
Contributor Author

Great! Then, I can go to bed. Thank you again, Alexey.

@bader bader merged commit 0b18b49 into intel:sycl Mar 11, 2021
@bso-intel bso-intel deleted the subdevice-cache branch March 31, 2021 18:24
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@smaslov-intel smaslov-intel smaslov-intel approved these changes

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
3 participants
@bso-intel @bader @smaslov-intel