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[Driver][SYCL] Improve integration header usage when performing offload #3471

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Merged
merged 5 commits into from
Apr 7, 2021
Merged

[Driver][SYCL] Improve integration header usage when performing offload #3471

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315a535
[Driver][SYCL] Improve integration header usage when performing offload
mdtoguchi Apr 2, 2021
2bae7b4
Address review comment and update failing tests
mdtoguchi Apr 3, 2021
9e5c4a4
Merge remote-tracking branch 'otcshare_llvm/sycl' into int-header-per…
mdtoguchi Apr 3, 2021
b4ae4ce
Address review comments using StringRef
mdtoguchi Apr 5, 2021
d26d93a
Address review comments for test improvement
mdtoguchi Apr 6, 2021
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15 changes: 15 additions & 0 deletions clang/include/clang/Driver/Driver.h
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Original file line number Diff line number Diff line change
Expand Up @@ -648,6 +648,11 @@ class Driver {
/// Track filename used for the FPGA dependency info.
mutable llvm::StringMap<const std::string> FPGATempDepFiles;

/// A list of inputs and their corresponding integration headers. These
/// files are generated during the device compilation and are consumed
/// by the host compilation.
mutable llvm::StringMap<StringRef> IntegrationFileList;

public:
/// GetReleaseVersion - Parse (([0-9]+)(.([0-9]+)(.([0-9]+)?))?)? and
/// return the grouped values as integers. Numbers which are not
Expand Down Expand Up @@ -684,6 +689,16 @@ class Driver {
const std::string getFPGATempDepFile(const std::string &FileName) const {
return FPGATempDepFiles[FileName];
}

/// addIntegrationFiles - Add the integration files that will be populated
/// by the device compilation and used by the host compile.
void addIntegrationFiles(StringRef IntHeaderName, StringRef FileName) const {
IntegrationFileList.insert({FileName, IntHeaderName});
}
/// getIntegrationHeader - Get the integration header file
StringRef getIntegrationHeader(StringRef FileName) const {
return IntegrationFileList[FileName];
}
};

/// \return True if the last defined optimization level is -Ofast.
Expand Down
1 change: 0 additions & 1 deletion clang/include/clang/Driver/Types.def
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Expand Up @@ -101,7 +101,6 @@ TYPE("dependencies", Dependencies, INVALID, "d", phases
TYPE("cuda-fatbin", CUDA_FATBIN, INVALID, "fatbin", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("hip-fatbin", HIP_FATBIN, INVALID, "hipfb", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("spirv", SPIRV, INVALID, "spv", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("sycl-header", SYCL_Header, INVALID, "h", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("sycl-fatbin", SYCL_FATBIN, INVALID, nullptr, phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("tempfilelist", Tempfilelist, INVALID, "txt", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("tempfiletable", Tempfiletable,INVALID, "table", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
Expand Down
25 changes: 17 additions & 8 deletions clang/lib/Driver/Driver.cpp
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Expand Up @@ -3854,17 +3854,10 @@ class OffloadingActionBuilder final {
}
}

// FIXME: This adds the integration header generation pass before the
// Host compilation pass so the Host can use the header generated. This
// can be improved upon to where the header generation and spv generation
// is done in the same step. Currently, its not too efficient.
// The host depends on the generated integrated header from the device
// compilation.
// Device compilation generates LLVM BC.
if (CurPhase == phases::Compile) {
bool SYCLDeviceOnly = Args.hasArg(options::OPT_fsycl_device_only);
for (Action *&A : SYCLDeviceActions) {
DeviceCompilerInput =
C.MakeAction<CompileJobAction>(A, types::TY_SYCL_Header);
types::ID OutputType = types::TY_LLVM_BC;
if (SYCLDeviceOnly) {
if (Args.hasArg(options::OPT_S))
Expand All @@ -3879,6 +3872,7 @@ class OffloadingActionBuilder final {
}
}
A = C.MakeAction<CompileJobAction>(A, OutputType);
DeviceCompilerInput = A;
}
const auto *TC = ToolChains.front();
const char *BoundArch = nullptr;
Expand Down Expand Up @@ -5113,6 +5107,21 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,

handleArguments(C, Args, Inputs, Actions);

// When compiling for -fsycl, generate the integration header files that
// will be used during the compilation.
if (Args.hasFlag(options::OPT_fsycl, options::OPT_fno_sycl, false)) {
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Shouldn't this be also working when using -fsycl-device-only ?

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-fsycl-device-only doesn't perform the host compilation, so the generated integration header would not be used. Unless there is a use model for it, I don't think it's necessary.

for (auto &I : Inputs) {
if (!types::isSrcFile(I.first))
continue;
std::string SrcFileName(I.second->getAsString(Args));
std::string TmpFileNameHeader = C.getDriver().GetTemporaryPath(
llvm::sys::path::stem(SrcFileName).str() + "-header", "h");
StringRef TmpFileHeader =
C.addTempFile(C.getArgs().MakeArgString(TmpFileNameHeader));
addIntegrationFiles(TmpFileHeader, SrcFileName);
}
}

// Builder to be used to build offloading actions.
OffloadingActionBuilder OffloadBuilder(C, Args, Inputs);

Expand Down
30 changes: 16 additions & 14 deletions clang/lib/Driver/ToolChains/Clang.cpp
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Expand Up @@ -4517,8 +4517,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
} else {
assert((isa<CompileJobAction>(JA) || isa<BackendJobAction>(JA)) &&
"Invalid action for clang tool.");
if (JA.getType() == types::TY_Nothing ||
JA.getType() == types::TY_SYCL_Header) {
if (JA.getType() == types::TY_Nothing) {
CmdArgs.push_back("-fsyntax-only");
} else if (JA.getType() == types::TY_LLVM_IR ||
JA.getType() == types::TY_LTO_IR) {
Expand Down Expand Up @@ -6622,17 +6621,16 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
// Add any options that are needed specific to SYCL offload while
// performing the host side compilation.
if (!IsSYCLOffloadDevice) {
// Host-side SYCL compilation receives the integration header file as
// Inputs[1]. Include the header with -include
if (SYCLDeviceInput) {
const char *IntHeaderPath =
Args.MakeArgString(SYCLDeviceInput->getFilename());
// Add the integration header option to generate the header.
StringRef Header = D.getIntegrationHeader(Input.getBaseInput());
if (types::getPreprocessedType(InputType) != types::TY_INVALID &&
!Header.empty()) {
CmdArgs.push_back("-include");
CmdArgs.push_back(IntHeaderPath);
CmdArgs.push_back(Args.MakeArgString(Header));
// When creating dependency information, filter out the generated
// header file.
CmdArgs.push_back("-dependency-filter");
CmdArgs.push_back(IntHeaderPath);
CmdArgs.push_back(Args.MakeArgString(Header));
}
// Let the FE know we are doing a SYCL offload compilation, but we are
// doing the host pass.
Expand All @@ -6653,12 +6651,16 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
}
}
}
if (IsSYCLOffloadDevice && JA.getType() == types::TY_SYCL_Header) {
// Generating a SYCL Header
SmallString<128> HeaderOpt("-fsycl-int-header=");
HeaderOpt += Output.getFilename();
CmdArgs.push_back(Args.MakeArgString(HeaderOpt));
if (IsSYCLOffloadDevice) {
// Add the integration header option to generate the header.
StringRef Header(D.getIntegrationHeader(Input.getBaseInput()));
if (!Header.empty()) {
SmallString<128> HeaderOpt("-fsycl-int-header=");
HeaderOpt.append(Header);
CmdArgs.push_back(Args.MakeArgString(HeaderOpt));
}
}

if (Args.hasArg(options::OPT_fsycl_unnamed_lambda))
CmdArgs.push_back("-fsycl-unnamed-lambda");

Expand Down
35 changes: 17 additions & 18 deletions clang/test/Driver/sycl-intelfpga-aoco-win.cpp
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Expand Up @@ -7,36 +7,35 @@
// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-pc-windows-msvc -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco
// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc
// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// RUN: %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \
// RUN: %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 2: preprocessor, {1}, c++-cpp-output, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 3: input, "[[INPUTSRC]]", c++, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 4: preprocessor, {3}, c++-cpp-output, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 5: compiler, {4}, sycl-header, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 5: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 6: offload, "host-sycl (x86_64-pc-windows-msvc)" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {5}, c++-cpp-output
// CHK-FPGA-AOCO-PHASES-WIN: 7: compiler, {6}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 8: backend, {7}, assembler, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 9: assembler, {8}, object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 10: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 11: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 12: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-deps, {12}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 14: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: clang-offload-unbundler, {14}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 16: linker, {11, 13, 15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: sycl-post-link, {16}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: llvm-spirv, {17}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-unbundler, {19}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-wrapper, {23}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 25: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {24}, image
// CHK-FPGA-AOCO-PHASES-WIN: 11: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 12: clang-offload-deps, {11}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image

/// aoco test, checking tools
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
Expand Down
66 changes: 32 additions & 34 deletions clang/test/Driver/sycl-intelfpga-aoco.cpp
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Expand Up @@ -20,57 +20,55 @@
// CHK-FPGA-AOCO-PHASES: 2: preprocessor, {1}, c++-cpp-output, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 3: input, "[[INPUTCPP]]", c++, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 4: preprocessor, {3}, c++-cpp-output, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 5: compiler, {4}, sycl-header, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 5: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 6: offload, "host-sycl (x86_64-unknown-linux-gnu)" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {5}, c++-cpp-output
// CHK-FPGA-AOCO-PHASES: 7: compiler, {6}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 8: backend, {7}, assembler, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 9: assembler, {8}, object, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 10: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 11: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 12: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 13: clang-offload-deps, {12}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 14: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 15: clang-offload-unbundler, {14}, archive
// CHK-FPGA-AOCO-PHASES: 16: linker, {11, 13, 15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: sycl-post-link, {16}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: llvm-spirv, {17}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 20: clang-offload-unbundler, {19}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 24: clang-offload-wrapper, {23}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 25: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {24}, image
// CHK-FPGA-AOCO-PHASES: 11: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 12: clang-offload-deps, {11}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image

/// FPGA AOCO Windows phases check
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "{{.*}}", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 2: preprocessor, {1}, c++-cpp-output, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 3: input, "[[INPUTSRC]]", c++, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 4: preprocessor, {3}, c++-cpp-output, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 5: compiler, {4}, sycl-header, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 5: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 6: offload, "host-sycl (x86_64-pc-windows-msvc)" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {5}, c++-cpp-output
// CHK-FPGA-AOCO-PHASES-WIN: 7: compiler, {6}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 8: backend, {7}, assembler, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 9: assembler, {8}, object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 10: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 11: compiler, {4}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 12: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-deps, {12}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 14: input, "[[INPUTA:.+\.a]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: clang-offload-unbundler, {14}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 16: linker, {11, 13, 15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: sycl-post-link, {16}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: llvm-spirv, {17}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-unbundler, {19}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-wrapper, {23}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 25: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {24}, image
// CHK-FPGA-AOCO-PHASES-WIN: 11: linker, {0, 9}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 12: clang-offload-deps, {11}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dependencies_list
// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image

/// aoco test, checking tools
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
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