Skip to content

[Driver][SYCL] Enable multi-file for AOT #3609

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 8 commits into from
Apr 30, 2021
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
100 changes: 41 additions & 59 deletions clang/lib/Driver/Driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3785,9 +3785,6 @@ class OffloadingActionBuilder final {
/// Flag to signal if the user requested device code split.
bool DeviceCodeSplit = false;

/// Flag to signal if DAE optimization is turned on.
bool EnableDAE = false;

/// The SYCL actions for the current input.
ActionList SYCLDeviceActions;

Expand Down Expand Up @@ -4278,33 +4275,33 @@ class OffloadingActionBuilder final {
// .--------------------------------------.
// | PostLink |
// .--------------------------------------.
// [.n] [.!na!s] [+*] [+*]
// | | | |
// | | .----------------. |
// | | |FileTableTform | |
// | | |(extract "Code")| |
// | | .----------------. |
// | | [-] |
// | | | |
// | [.a!s] [-*] |
// .-------------. .---------------------. |
// |finalizeNVPTX| | SPIRVTranslator | |
// .-------------. .---------------------. |
// | [.a!s] [-as] [-!a] |
// | | | | |
// | [.!s] [-s] | |
// | .----------------. | |
// | | BackendCompile | | |
// | .----------------. | |
// | [.!s] [-s] | |
// | | | | |
// | | [-a] [-!a] [+]
// | | .----------------.
// | | |FileTableTform |
// | | |(replace "Code")|
// | | .----------------.
// | | |
// [.n] [.!na!s] [+*]
// [.n] [+*] [+*]
// | | |
// | .-----------------. |
// | | FileTableTform | |
// | | (extract "Code")| |
// | .-----------------. |
// | [-] |
// | | |
// | [-*] |
// .-------------. .-------------------. |
// |finalizeNVPTX| | SPIRVTranslator | |
// .-------------. .-------------------. |
// | [-as] [-!a] |
// | | | |
// | [-s] | |
// | .----------------. | |
// | | BackendCompile | | |
// | .----------------. | |
// | [-s] | |
// | | | |
// | [-a] [-!a] [+]
// | .--------------------.
// | | FileTableTform |
// | | (replace "Code") |
// | .--------------------.
// | |
// [.n] [+*]
// .--------------------------------------.
// | OffloadWrapper |
// .--------------------------------------.
Expand Down Expand Up @@ -4351,10 +4348,8 @@ class OffloadingActionBuilder final {
ActionList WrapperInputs;
// post link is not optional - even if not splitting, always need to
// process specialization constants
bool MultiFileActionDeps = !isSpirvAOT || DeviceCodeSplit || EnableDAE;
types::ID PostLinkOutType = isNVPTX || !MultiFileActionDeps
? types::TY_LLVM_BC
: types::TY_Tempfiletable;
types::ID PostLinkOutType =
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

please update the picture and the doc

isNVPTX ? types::TY_LLVM_BC : types::TY_Tempfiletable;
auto *PostLinkAction = C.MakeAction<SYCLPostLinkJobAction>(
FullDeviceLinkAction, PostLinkOutType);
PostLinkAction->setRTSetsSpecConstants(!isAOT);
Expand All @@ -4366,21 +4361,14 @@ class OffloadingActionBuilder final {
} else {
// For SPIRV-based targets - translate to SPIRV then optionally
// compile ahead-of-time to native architecture
Action *SPIRVInput = PostLinkAction;
constexpr char COL_CODE[] = "Code";

if (MultiFileActionDeps) {
auto *ExtractIRFilesAction = C.MakeAction<FileTableTformJobAction>(
PostLinkAction, types::TY_Tempfilelist);
// single column w/o title fits TY_Tempfilelist format
ExtractIRFilesAction->addExtractColumnTform(COL_CODE,
false /*drop titles*/);
SPIRVInput = ExtractIRFilesAction;
}
types::ID SPIRVOutType =
MultiFileActionDeps ? types::TY_Tempfilelist : types::TY_SPIRV;
Action *BuildCodeAction =
C.MakeAction<SPIRVTranslatorJobAction>(SPIRVInput, SPIRVOutType);
auto *ExtractIRFilesAction = C.MakeAction<FileTableTformJobAction>(
PostLinkAction, types::TY_Tempfilelist);
// single column w/o title fits TY_Tempfilelist format
ExtractIRFilesAction->addExtractColumnTform(COL_CODE,
false /*drop titles*/);
Action *BuildCodeAction = C.MakeAction<SPIRVTranslatorJobAction>(
ExtractIRFilesAction, types::TY_Tempfilelist);

// After the Link, wrap the files before the final host link
if (isSpirvAOT) {
Expand Down Expand Up @@ -4412,14 +4400,11 @@ class OffloadingActionBuilder final {
BuildCodeAction =
C.MakeAction<BackendCompileJobAction>(BEInputs, OutType);
}
if (MultiFileActionDeps) {
ActionList TformInputs{PostLinkAction, BuildCodeAction};
auto *ReplaceFilesAction = C.MakeAction<FileTableTformJobAction>(
TformInputs, types::TY_Tempfiletable);
ReplaceFilesAction->addReplaceColumnTform(COL_CODE, COL_CODE);
BuildCodeAction = ReplaceFilesAction;
}
WrapperInputs.push_back(BuildCodeAction);
ActionList TformInputs{PostLinkAction, BuildCodeAction};
auto *ReplaceFilesAction = C.MakeAction<FileTableTformJobAction>(
TformInputs, types::TY_Tempfiletable);
ReplaceFilesAction->addReplaceColumnTform(COL_CODE, COL_CODE);
WrapperInputs.push_back(ReplaceFilesAction);
}
// After the Link, wrap the files before the final host link
auto *DeviceWrappingAction = C.MakeAction<OffloadWrapperJobAction>(
Expand Down Expand Up @@ -4523,9 +4508,6 @@ class OffloadingActionBuilder final {
WrapDeviceOnlyBinary = Args.hasArg(options::OPT_fsycl_link_EQ);
auto *DeviceCodeSplitArg =
Args.getLastArg(options::OPT_fsycl_device_code_split_EQ);
EnableDAE =
Args.hasFlag(options::OPT_fsycl_dead_args_optimization,
options::OPT_fno_sycl_dead_args_optimization, false);
// -fsycl-device-code-split is an alias to
// -fsycl-device-code-split=per_source
DeviceCodeSplit = DeviceCodeSplitArg &&
Expand Down
30 changes: 16 additions & 14 deletions clang/test/Driver/sycl-intelfpga-aoco-win.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,15 +27,17 @@
// CHK-FPGA-AOCO-PHASES-WIN: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: file-table-tform, {16}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: llvm-spirv, {17}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-unbundler, {19}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: file-table-tform, {16, 23}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 25: clang-offload-wrapper, {24}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 26: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {25}, image

/// aoco test, checking tools
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a -Xshardware -### %s 2>&1 \
Expand All @@ -44,12 +46,12 @@
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]]" "-unbundle"
// CHK-FPGA-AOCO: llvm-link{{.*}} "[[OUTLIB]]" "-o" "[[LINKEDBC:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link
// CHK-FPGA-AOCO-NOT: -split-esimd
// CHK-FPGA-AOCO: "-ir-output-only" "-O2" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
// CHK-FPGA-AOCO: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]"
// CHK-FPGA-AOCO: link.exe{{.*}} "{{.*}}[[INPUTLIB]]" {{.*}} "[[FINALOBJW]]"
50 changes: 27 additions & 23 deletions clang/test/Driver/sycl-intelfpga-aoco.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,15 +31,17 @@
// CHK-FPGA-AOCO-PHASES: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image
// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: file-table-tform, {16}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: llvm-spirv, {17}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 20: clang-offload-unbundler, {19}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 24: file-table-tform, {16, 23}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 25: clang-offload-wrapper, {24}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 26: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {25}, image

/// FPGA AOCO Windows phases check
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -ccc-print-phases 2>&1 \
Expand All @@ -60,15 +62,17 @@
// CHK-FPGA-AOCO-PHASES-WIN: 13: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 14: clang-offload-unbundler, {13}, archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: linker, {5, 12, 14}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, spirv, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 23: clang-offload-wrapper, {22}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image
// CHK-FPGA-AOCO-PHASES-WIN: 16: sycl-post-link, {15}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: file-table-tform, {16}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: llvm-spirv, {17}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 19: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-unbundler, {19}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 23: backend-compiler, {18, 20, 22}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: file-table-tform, {16, 23}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 25: clang-offload-wrapper, {24}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 26: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {25}, image

/// aoco test, checking tools
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
Expand All @@ -81,13 +85,13 @@
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]]" "-unbundle"
// CHK-FPGA-AOCO: llvm-link{{.*}} "[[OUTLIB]]" "-o" "[[LINKEDBC:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link
// CHK-FPGA-AOCO-NOT: "-split-esimd"
// CHK-FPGA-AOCO: "-ir-output-only" "-O2" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
// CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]"
// CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]"
// CHK-FPGA-AOCO-LIN: ld{{.*}} "[[INPUTLIB]]" {{.*}} "[[FINALOBJL]]"
Expand Down
16 changes: 9 additions & 7 deletions clang/test/Driver/sycl-intelfpga-static-lib-win.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,13 +20,15 @@
// CHECK_PHASES: 4: input, "[[INPUT]]", archive
// CHECK_PHASES: 5: clang-offload-unbundler, {4}, archive
// CHECK_PHASES: 6: linker, {3, 5}, ir, (device-sycl)
// CHECK_PHASES: 7: sycl-post-link, {6}, ir, (device-sycl)
// CHECK_PHASES: 8: llvm-spirv, {7}, spirv, (device-sycl)
// CHECK_PHASES: 9: input, "[[INPUT]]", archive
// CHECK_PHASES: 10: clang-offload-unbundler, {9}, fpga_dep_list
// CHECK_PHASES: 11: backend-compiler, {8, 10}, fpga_aocx, (device-sycl)
// CHECK_PHASES: 12: clang-offload-wrapper, {11}, object, (device-sycl)
// CHECK_PHASES: 13: offload, "host-sycl (x86_64-pc-windows-msvc)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {12}, image
// CHECK_PHASES: 7: sycl-post-link, {6}, tempfiletable, (device-sycl)
// CHECK_PHASES: 8: file-table-tform, {7}, tempfilelist, (device-sycl)
// CHECK_PHASES: 9: llvm-spirv, {8}, tempfilelist, (device-sycl)
// CHECK_PHASES: 10: input, "[[INPUT]]", archive
// CHECK_PHASES: 11: clang-offload-unbundler, {10}, fpga_dep_list
// CHECK_PHASES: 12: backend-compiler, {9, 11}, fpga_aocx, (device-sycl)
// CHECK_PHASES: 13: file-table-tform, {7, 12}, tempfiletable, (device-sycl)
// CHECK_PHASES: 14: clang-offload-wrapper, {13}, object, (device-sycl)
// CHECK_PHASES: 15: offload, "host-sycl (x86_64-pc-windows-msvc)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {14}, image

/// Check for unbundle and use of deps in static lib
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t.lib -### 2>&1 \
Expand Down
Loading