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[SYCL] [FPGA] Manually revert header change of variadic template argument list #4260

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Merged
merged 3 commits into from
Aug 9, 2021

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The previous patch #3957 was a prerequisite change for the upcoming FPGA latency controls feature.
Revert due to a late change to the proposed use model API of latency controls.

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The previous patch intel#3957 was a prerequisite change for the upcoming FPGA latency control feature. 
Revert due to a late change to the proposed use model API.
@shuoniu-intel shuoniu-intel marked this pull request as ready for review August 5, 2021 13:05
@shuoniu-intel shuoniu-intel requested a review from a team as a code owner August 5, 2021 13:05
@romanovvlad romanovvlad merged commit 9a5f39a into intel:sycl Aug 9, 2021
@shuoniu-intel shuoniu-intel deleted the br-revert-template-list branch August 9, 2021 12:35
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