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[SYCL][HIP][libclc] Fix wrong address spaces for HIP #4966

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Jan 11, 2022
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2 changes: 2 additions & 0 deletions clang/lib/Basic/Targets/AMDGPU.h
Original file line number Diff line number Diff line change
Expand Up @@ -328,6 +328,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
case OCLTK_Queue:
case OCLTK_ReserveID:
return LangAS::opencl_global;
case OCLTK_Event:
return LangAS::opencl_private;

default:
return TargetInfo::getOpenCLTypeAddrSpace(TK);
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1 change: 1 addition & 0 deletions libclc/amdgcn-amdhsa/libspirv/SOURCES
Original file line number Diff line number Diff line change
Expand Up @@ -15,3 +15,4 @@ workitem/get_sub_group_id.cl
workitem/get_sub_group_local_id.cl
workitem/get_sub_group_size.cl
misc/sub_group_shuffle.cl
async/wait_group_events.cl
17 changes: 17 additions & 0 deletions libclc/amdgcn-amdhsa/libspirv/async/wait_group_events.cl
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
//===----------------------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include <spirv/spirv.h>

_CLC_DEF void _Z23__spirv_GroupWaitEventsjiP9ocl_event(unsigned int scope,
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Suggested change
_CLC_DEF void _Z23__spirv_GroupWaitEventsjiP9ocl_event(unsigned int scope,
_CLC_DEF _CLC_OVERLOAD void __spirv_GroupWaitEvents(unsigned int scope,

it is also missing the overload for private

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I tried adding that, but I can't get it to work (linker is not finding this).

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https://github.com/intel/llvm/blob/sycl/clang/lib/AST/ItaniumMangle.cpp#L2560 is causing different mangling.

In SYCL mode, Default will be 0, so no UAS0 will be added, by in CL mode, Default is 5 (private) causing the addition of UAS0.

This could either be recovered by the remangler (a bit dirty but more scalable) or handled by manual mangling (not great).

int num_events,
event_t __attribute__((address_space(0)))* event_list) {
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@bader bader Nov 16, 2021

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I think using __private is better here.
OTOH, I don't fully understand the problem. If we compile this code with -cl-std=CL2.0, event_list will point to generic address space.
What exactly is the problem here?

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0 is generic here (5 is private)

If we compile this code with -cl-std=CL2.0

there is a need for selective enabling of 2.0. The lib is tailored for 1.2 so that will probably not turned as expected (you suddenly make pointers to private pointers to generic).

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Oh... wait. Are we calling OpenCL 1.2 built-in here? Shouldn't we apply private address space attribute on SYCL side in this case and explicitly cast to correct AS?

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Well there is an overload for generic. Never mattered for PTX because the target address space for private and generic overlap.

The runtime header could be patch to call the privare overload (it will always be a pointer to private AFAIK).

But TBH, there is an issue in the device event design as the stored pointer is a dangling one #4959

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The runtime header could be patch to call the privare overload (it will always be a pointer to private AFAIK).

So, which way do you think is better to handle this issue: update the runtime to call correct overload overload or apply this patch?

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@Naghasan I think the question above was meant for you.

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oups sorry

So, which way do you think is better to handle this issue: update the runtime to call correct overload overload or apply this patch?

There is a need for a broader course of action regarding generic address space handling here, so as the patch is ready, I would say ship it. Once the generic is better handled, this will go away.

__spirv_ControlBarrier(scope, Workgroup, SequentiallyConsistent);
}