[WIP][SYCL] Make sycl-post-link process split modules sequentially, simplify. #5001
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- Split module extraction is now done sequentially, not keeping all modules resulting from split alive in RAM. - Post link actions are separated into clear parts simplifying the logic - Initial support for keeping SYCL and ESIMD code in the same module, needed for invoke_simd. - Add convenience constructor to SimpleTable. Signed-off-by: Konstantin S Bobrovsky <[email protected]>
kbobrovs
requested review from
AlexeySachkov,
kychendev,
mlychkov,
sndmitriev and
v-klochkov
as code owners
mlychkov
approved these changes
Nov 22, 2021
| TableFiles TblFiles; | ||
| if (!M) | ||
| return TblFiles; | ||
| struct IrPropSymFilenameTripple { |
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Suggested change
| struct IrPropSymFilenameTripple { | |
| struct IrPropSymFilenameTriple { |
| if (DoSymGen) { | ||
| ColumnTitles.push_back(COL_SYM); | ||
| } | ||
| std::unique_ptr<util::SimpleTable> Table = std::make_unique<util::SimpleTable>(ColumnTitles); |
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| std::unique_ptr<util::SimpleTable> Table = std::make_unique<util::SimpleTable>(ColumnTitles); | |
| auto Table = std::make_unique<util::SimpleTable>(ColumnTitles); |
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| const Function *F1 = dyn_cast_or_null<Function>(VMap[F]); | ||
| assert(F1 && "clone error"); | ||
| return F1; |
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| const Function *F1 = dyn_cast_or_null<Function>(VMap[F]); | |
| assert(F1 && "clone error"); | |
| return F1; | |
| return cast<Function>(VMap[F]); |
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| std::unique_ptr<Module> M = nullptr; | ||
| std::vector<const Function*> EntryPoints; | ||
| std::string Name = ""; |
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Seems that this field is not used now.
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| std::pair<IRModuleDesc, IRModuleDesc> SyclEsimdModules = splitSyclEsimd(M1); | ||
| IRModuleDesc &MSycl = SyclEsimdModules.first; | ||
| IRModuleDesc &MEsimd = SyclEsimdModules.second; | ||
| SmallVector<IRModuleDesc, 2> MMs; | ||
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| if (MSycl.M.get()) { | ||
| MMs.emplace_back(std::move(SyclEsimdModules.first)); | ||
| } | ||
| if (MEsimd.M.get()) { | ||
| MMs.emplace_back(std::move(SyclEsimdModules.second)); | ||
| } |
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| std::pair<IRModuleDesc, IRModuleDesc> SyclEsimdModules = splitSyclEsimd(M1); | |
| IRModuleDesc &MSycl = SyclEsimdModules.first; | |
| IRModuleDesc &MEsimd = SyclEsimdModules.second; | |
| SmallVector<IRModuleDesc, 2> MMs; | |
| if (MSycl.M.get()) { | |
| MMs.emplace_back(std::move(SyclEsimdModules.first)); | |
| } | |
| if (MEsimd.M.get()) { | |
| MMs.emplace_back(std::move(SyclEsimdModules.second)); | |
| } | |
| SmallVector<IRModuleDesc, 2> MMs = splitSyclEsimd(M1); | |
| Modified = (MMs.size() > 1); |
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| ; CHECK-PROP2-NOT: [SYCL/specialization constants] | ||
| ; CHECK-PROP2-NOT: [SYCL/specialization constants default values] |
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| ; CHECK-PROP2-NOT: [SYCL/specialization constants] | |
| ; CHECK-PROP2-NOT: [SYCL/specialization constants default values] | |
| ; CHECK-PROP2-NOT: [SYCL/specialization constants |
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@mlychkov - thanks for the review. Per our today's discussion, I will wait for your two PRs - the cosmetic one and the one which will process split modules one-by-one (which might borrow some code from this patch). After that I will rebase this patch and continue the review/merge process. |
mlychkov
added a commit
to mlychkov/llvm
that referenced
this pull request
Nov 23, 2021
@kbobrovs Both PRs have been merged. You may rebase and continue work under this patch. |
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Replaced with #6160 |
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modules resulting from split alive in RAM.
for invoke_simd.
Signed-off-by: Konstantin S Bobrovsky [email protected]