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[SYCL][CUDA][libclc] Add atomic loads and stores with various memory orders and scopes #5191
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[SYCL][CUDA][libclc] Added atomic loads and stores with various memor…
t4c1 98aaa34
Merge branch 'sycl' into ptx_atomic_ldst
t4c1 be3b553
format and push/pop macros
t4c1 e400d17
removed redundant include and added tests for volatile intrinsics
t4c1 5c91b3d
removed tmp variable
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I think it would make things a bit more orderly if builtins would be using
__nvvm_ld
/__nvvm_st
prefix and put modifiers as suffixes in the same order they are used in the PTX instructions the builtins translate into.E.g.
__nvvm_ld_shared_acquire_gpu_i()
->ld.shared.acquire.gpu.u32
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That would be nice to have, but I would argue that being consistent with other builtins is more important. I was looking especially at atomic read-modify-write operations I worked on before, where we have for example
__nvvm_atom_acq_rel_sys_min_shared_i
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OK. We can live with the order of modifiers matching that of
__nvvm_atom
.That said,
__nvvm_atom
does have the instruction mnemonicatom
in front and so should theseld
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My understanding is that these have
atom
at the start because they also haveatom
in the PTX, which is not true forld
andst
instructions.