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[CI] Temporarily disable OCL FPGA Emulator #5707
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Do I understand it correctly that even if we bypass sycl-ls problem and re-enable FPGA emulator environment, there will be sporadic failures of llvm-test-suite tests?
Co-authored-by: Alexey Bader <[email protected]>
That's right, the tests will just fail later. |
FYI, the backtrace looks like this, so the very basic scenario is broken:
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Any ideas what might trigger this issue? I see that FPGA emulator hasn't been change for weeks - https://github.com/intel/llvm/blob/sycl/devops/dependencies.json, but the issue appeared quite recently. |
Hi @bader , is there any plan to enable oclfpgaemu back for CI testing?
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@yanfeng3721, do you know if this issue has been resolved?
To be honest, I would rather run tests for FPGA features on FPGA emulator rather than the whole test suite. There is minor difference between OpenCL CPU and FPGA emulator, so running non-FPGA tests with OpenCL CPU should be good enough. Tagging @pvchupin, @MrSidims and @AlexeySachkov to hear their opinions. |
FPGA emulator causes crashes on SYCL runtime initialization.