[SYCL][FPGA] Add host compilation check to intel-fpga-local test

[vmaksimo]

No description provided.

[AGindinson]

Actually, this is another example of a test where we might want to split the testing of separate attributes into multiple kernels. In case you're fine with adding a TODO within this PR, please do.

[vmaksimo]

Actually, this is another example of a test where we might want to split the testing of separate attributes into multiple kernels. In case you're fine with adding a TODO within this PR, please do.

Actually, I don't think that it's worth it in this case. I agree that it's hard to extend test with LLVM IR source, but for C++/SYCL code there are no such problems.

[AGindinson]

Actually, this is another example of a test where we might want to split the testing of separate attributes into multiple kernels. In case you're fine with adding a TODO within this PR, please do.

Actually, I don't think that it's worth it in this case. I agree that it's hard to extend test with LLVM IR source, but for C++/SYCL code there are no such problems.

While updating a thus-structured LLVM IR-based test is obviously worse, one still can feel the pain when reordering the "self-explaining" variable names in the FileCheck directives. Yes, VAR_TWO, VAR_FIVE, I'm talking to you!