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Add extended mnemonics (llvm#97571)
This PR adds a number of thus-far missing extended mnemonics to the assembler and disassembler for SystemZ. The following mnemonics have been added and are supported for the assembler and disassembler: - `NOP(R)?` - `LFI` - `RISBG(N)?Z` The following mnemonics have been added and are supported for the assembler only: - `JC(TH)?` - `LLG(F|H)I` - `NOT(G)?R`
1 parent de3e9d4 commit 9f4a25e

17 files changed

+181
-44
lines changed

‎lld/test/ELF/systemz-gotent-relax-und-dso.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,9 @@
1414
# DISASM: Disassembly of section .text:
1515
# DISASM-EMPTY:
1616
# DISASM-NEXT: <foo>:
17-
# DISASM-NEXT: bc 0, 0
17+
# DISASM-NEXT: nop 0
1818
# DISASM: <hid>:
19-
# DISASM-NEXT: bc 0, 0
19+
# DISASM-NEXT: nop 0
2020
# DISASM: <_start>:
2121
# DISASM-NEXT: lgrl %r1, 0x2400
2222
# DISASM-NEXT: lgrl %r1, 0x2400

‎lld/test/ELF/systemz-gotent-relax.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,9 @@
3030

3131
# DISASM: Disassembly of section .text:
3232
# DISASM: 00000000010011e0 <foo>:
33-
# DISASM-NEXT: bc 0, 0
33+
# DISASM-NEXT: nop 0
3434
# DISASM: 00000000010011e4 <hid>:
35-
# DISASM-NEXT: bc 0, 0
35+
# DISASM-NEXT: nop 0
3636
# DISASM: 00000000010011e8 <ifunc>:
3737
# DISASM-NEXT: br %r14
3838
# DISASM: 00000000010011ea <_start>:

‎lld/test/ELF/systemz-init-padding.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212

1313
# CHECK: <.init>:
1414
# CHECK-NEXT: brasl %r14,
15-
# CHECK-NEXT: bcr 0, %r7
15+
# CHECK-NEXT: nopr %r7
1616
# CHECK-NEXT: lg %r4, 272(%r15)
1717

1818
.text

‎lld/test/ELF/systemz-plt.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,9 @@
4848
# DIS-NEXT: 100102c: d2 07 f0 30 10 08 mvc 48(8,%r15), 8(%r1)
4949
# DIS-NEXT: 1001032: e3 10 10 10 00 04 lg %r1, 16(%r1)
5050
# DIS-NEXT: 1001038: 07 f1 br %r1
51-
# DIS-NEXT: 100103a: 07 00 bcr 0, %r0
52-
# DIS-NEXT: 100103c: 07 00 bcr 0, %r0
53-
# DIS-NEXT: 100103e: 07 00 bcr 0, %r0
51+
# DIS-NEXT: 100103a: 07 00 nopr %r0
52+
# DIS-NEXT: 100103c: 07 00 nopr %r0
53+
# DIS-NEXT: 100103e: 07 00 nopr %r0
5454
# DIS-NEXT: 1001040: c0 10 00 00 10 54 larl %r1, 0x10030e8
5555
# DIS-NEXT: 1001046: e3 10 10 00 00 04 lg %r1, 0(%r1)
5656
# DIS-NEXT: 100104c: 07 f1 br %r1

‎llvm/lib/Target/SystemZ/SystemZInstrFormats.td

Lines changed: 46 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -363,7 +363,8 @@ class InstRIEe<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
363363
let Inst{7-0} = op{7-0};
364364
}
365365

366-
class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
366+
class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern,
367+
bits<8> I3Or = 0, bits<8> I4Or = 0>
367368
: InstSystemZ<6, outs, ins, asmstr, pattern> {
368369
field bits<48> Inst;
369370
field bits<48> SoftFail = 0;
@@ -377,8 +378,22 @@ class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
377378
let Inst{47-40} = op{15-8};
378379
let Inst{39-36} = R1;
379380
let Inst{35-32} = R2;
380-
let Inst{31-24} = I3;
381-
let Inst{23-16} = I4;
381+
let Inst{31} = !if(I3Or{7}, 1, I3{7});
382+
let Inst{30} = !if(I3Or{6}, 1, I3{6});
383+
let Inst{29} = !if(I3Or{5}, 1, I3{5});
384+
let Inst{28} = !if(I3Or{4}, 1, I3{4});
385+
let Inst{27} = !if(I3Or{3}, 1, I3{3});
386+
let Inst{26} = !if(I3Or{2}, 1, I3{2});
387+
let Inst{25} = !if(I3Or{1}, 1, I3{1});
388+
let Inst{24} = !if(I3Or{0}, 1, I3{0});
389+
let Inst{23} = !if(I4Or{7}, 1, I4{7});
390+
let Inst{22} = !if(I4Or{6}, 1, I4{6});
391+
let Inst{21} = !if(I4Or{5}, 1, I4{5});
392+
let Inst{20} = !if(I4Or{4}, 1, I4{4});
393+
let Inst{19} = !if(I4Or{3}, 1, I4{3});
394+
let Inst{18} = !if(I4Or{2}, 1, I4{2});
395+
let Inst{17} = !if(I4Or{1}, 1, I4{1});
396+
let Inst{16} = !if(I4Or{0}, 1, I4{0});
382397
let Inst{15-8} = I5;
383398
let Inst{7-0} = op{7-0};
384399
}
@@ -2349,6 +2364,12 @@ class AsmCondBranchRR<string mnemonic, bits<8> opcode>
23492364
: InstRR<opcode, (outs), (ins imm32zx4:$R1, GR64:$R2),
23502365
mnemonic#"\t$R1, $R2", []>;
23512366

2367+
class NeverCondBranchRR<string mnemonic, bits<8> opcode>
2368+
: InstRR<opcode, (outs), (ins GR64:$R2),
2369+
mnemonic#"\t$R2", []> {
2370+
let R1 = 0;
2371+
}
2372+
23522373
class FixedCondBranchRR<CondVariant V, string mnemonic, bits<8> opcode,
23532374
SDPatternOperator operator = null_frag>
23542375
: InstRR<opcode, (outs), (ins ADDR64:$R2),
@@ -2370,6 +2391,13 @@ class AsmCondBranchRX<string mnemonic, bits<8> opcode>
23702391
(ins imm32zx4:$M1, (bdxaddr12only $B2, $D2, $X2):$XBD2),
23712392
mnemonic#"\t$M1, $XBD2", []>;
23722393

2394+
class NeverCondBranchRX<string mnemonic, bits<8> opcode>
2395+
: InstRXb<opcode, (outs),
2396+
(ins (bdxaddr12only $B2, $D2, $X2):$XBD2),
2397+
mnemonic#"\t$XBD2", []> {
2398+
let M1 = 0;
2399+
}
2400+
23732401
class FixedCondBranchRX<CondVariant V, string mnemonic, bits<8> opcode>
23742402
: InstRXb<opcode, (outs), (ins (bdxaddr12only $B2, $D2, $X2):$XBD2),
23752403
!subst("#", V.suffix, mnemonic)#"\t$XBD2", []> {
@@ -3439,6 +3467,19 @@ class BinaryRRFa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
34393467
let OpType = "reg";
34403468
}
34413469

3470+
3471+
class UnaryRRFa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3472+
RegisterOperand cls1, RegisterOperand cls2>
3473+
: InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls2:$R3),
3474+
mnemonic#"\t$R1, $R2",
3475+
[(set cls1:$R1, (operator cls2:$R2, cls2:$R3))]> {
3476+
let R3 = R2;
3477+
let M4 = 0;
3478+
let OpKey = mnemonic#cls1;
3479+
let OpType = "reg";
3480+
}
3481+
3482+
34423483
multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
34433484
SDPatternOperator operator, RegisterOperand cls1,
34443485
RegisterOperand cls2> {
@@ -4999,11 +5040,11 @@ multiclass CmpSwapRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
49995040
}
50005041

50015042
class RotateSelectRIEf<string mnemonic, bits<16> opcode, RegisterOperand cls1,
5002-
RegisterOperand cls2>
5043+
RegisterOperand cls2, bits<8> I3Or = 0, bits<8> I4Or = 0>
50035044
: InstRIEf<opcode, (outs cls1:$R1),
50045045
(ins cls1:$R1src, cls2:$R2, imm32zx8:$I3, imm32zx8:$I4,
50055046
imm32zx8:$I5),
5006-
mnemonic#"\t$R1, $R2, $I3, $I4, $I5", []> {
5047+
mnemonic#"\t$R1, $R2, $I3, $I4, $I5", [], I3Or, I4Or> {
50075048
let Constraints = "$R1 = $R1src";
50085049
let DisableEncoding = "$R1src";
50095050
}

‎llvm/lib/Target/SystemZ/SystemZInstrInfo.td

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -111,11 +111,11 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
111111
// NOPs. These are again variants of the conditional branches, with the
112112
// condition mask set to "never". NOP_bare can't be an InstAlias since it
113113
// would need R0D hard coded which is not part of ADDR64BitRegClass.
114-
def NOP : InstAlias<"nop\t$XBD", (BCAsm 0, bdxaddr12only:$XBD), 0>;
114+
def NOP : NeverCondBranchRX<"nop", 0x47>;
115115
let isAsmParserOnly = 1, hasNoSchedulingInfo = 1, M1 = 0, X2 = 0, B2 = 0, D2 = 0 in
116116
def NOP_bare : InstRXb<0x47,(outs), (ins), "nop", []>;
117-
def NOPR : InstAlias<"nopr\t$R", (BCRAsm 0, GR64:$R), 0>;
118-
def NOPR_bare : InstAlias<"nopr", (BCRAsm 0, R0D), 0>;
117+
def NOPR : NeverCondBranchRR<"nopr", 0x07>;
118+
def NOPR_bare : InstAlias<"nopr", (NOPR R0D), 0>;
119119

120120
// An alias of BRC 0, label
121121
def JNOP : InstAlias<"jnop\t$RI2", (BRCAsm 0, brtarget16:$RI2), 0>;
@@ -464,6 +464,8 @@ let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
464464
def LLILF : UnaryRIL<"llilf", 0xC0F, bitconvert, GR64, imm64lf32>;
465465
def LLIHF : UnaryRIL<"llihf", 0xC0E, bitconvert, GR64, imm64hf32>;
466466
}
467+
def LLGFI : InstAlias<"llgfi\t$R1, $RI1", (LLILF GR64:$R1, imm64lf32:$RI1)>;
468+
def LLGHI : InstAlias<"llghi\t$R1, $RI1", (LLILL GR64:$R1, imm64ll16:$RI1)>;
467469

468470
// Register loads.
469471
let canFoldAsLoad = 1, SimpleBDXLoad = 1, mayLoad = 1 in {
@@ -973,6 +975,7 @@ let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
973975
def IILF : UnaryRIL<"iilf", 0xC09, bitconvert, GR32, uimm32>;
974976
def IIHF : UnaryRIL<"iihf", 0xC08, bitconvert, GRH32, uimm32>;
975977
}
978+
def LFI : InstAlias<"lfi\t$R1, $RI1", (IILF GR32:$R1, uimm32:$RI1)>;
976979
def IILF64 : BinaryAliasRIL<insertlf, GR64, imm64lf32>;
977980
def IIHF64 : BinaryAliasRIL<inserthf, GR64, imm64hf32>;
978981

@@ -1372,6 +1375,10 @@ let Predicates = [FeatureMiscellaneousExtensions3],
13721375
let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
13731376
def NORK : BinaryRRFa<"nork", 0xB976, nor, GR32, GR32, GR32>;
13741377
def NOGRK : BinaryRRFa<"nogrk", 0xB966, nor, GR64, GR64, GR64>;
1378+
let isAsmParserOnly = 1 in {
1379+
def NOTR : UnaryRRFa<"notr", 0xB976, nor, GR32, GR32>;
1380+
def NOTGR : UnaryRRFa<"notgr", 0xB966, nor, GR64, GR64>;
1381+
}
13751382
}
13761383

13771384
// NXOR.
@@ -1526,13 +1533,17 @@ def RLLG : BinaryRSY<"rllg", 0xEB1C, shiftop<rotl>, GR64>;
15261533
let Defs = [CC] in {
15271534
let isCodeGenOnly = 1 in
15281535
def RISBG32 : RotateSelectRIEf<"risbg", 0xEC55, GR32, GR32>;
1529-
let CCValues = 0xE, CompareZeroCCMask = 0xE in
1536+
let CCValues = 0xE, CompareZeroCCMask = 0xE in {
15301537
def RISBG : RotateSelectRIEf<"risbg", 0xEC55, GR64, GR64>;
1538+
def RISBGZ : RotateSelectRIEf<"risbgz", 0xEC55, GR64, GR64, 0, 128>;
1539+
}
15311540
}
15321541

15331542
// On zEC12 we have a variant of RISBG that does not set CC.
1534-
let Predicates = [FeatureMiscellaneousExtensions] in
1543+
let Predicates = [FeatureMiscellaneousExtensions] in {
15351544
def RISBGN : RotateSelectRIEf<"risbgn", 0xEC59, GR64, GR64>;
1545+
def RISBGNZ : RotateSelectRIEf<"risbgnz", 0xEC59, GR64, GR64, 0, 128>;
1546+
}
15361547

15371548
// Forms of RISBG that only affect one word of the destination register.
15381549
// They do not set CC.
@@ -2330,6 +2341,8 @@ defm : BlockLoadStore<load, i64, MVCImm, NCImm, OCImm, XCImm, 7>;
23302341

23312342
def JCT : MnemonicAlias<"jct", "brct">;
23322343
def JCTG : MnemonicAlias<"jctg", "brctg">;
2344+
def JC : MnemonicAlias<"jc", "brc">;
2345+
def JCTH : MnemonicAlias<"jcth", "brcth">;
23332346
def JAS : MnemonicAlias<"jas", "bras">;
23342347
def JASL : MnemonicAlias<"jasl", "brasl">;
23352348
def JXH : MnemonicAlias<"jxh", "brxh">;

‎llvm/lib/Target/SystemZ/SystemZScheduleZ13.td

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -506,9 +506,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
506506
def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
507507

508508
// Rotate and insert
509-
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
510509
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
511510
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
511+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?$")>;
512512
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
513513

514514
// Rotate and Select
@@ -1553,5 +1553,11 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
15531553
def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
15541554
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
15551555

1556+
//===----------------------------------------------------------------------===//
1557+
// NOPs
1558+
//===----------------------------------------------------------------------===//
1559+
1560+
def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?$")>;
1561+
15561562
}
15571563

‎llvm/lib/Target/SystemZ/SystemZScheduleZ14.td

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -516,9 +516,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
516516
def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
517517

518518
// Rotate and insert
519-
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
520519
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
521520
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
521+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?$")>;
522522
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
523523

524524
// Rotate and Select
@@ -1643,5 +1643,11 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
16431643
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
16441644
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
16451645

1646+
//===----------------------------------------------------------------------===//
1647+
// NOPs
1648+
//===----------------------------------------------------------------------===//
1649+
1650+
def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?$")>;
1651+
16461652
}
16471653

‎llvm/lib/Target/SystemZ/SystemZScheduleZ15.td

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -471,6 +471,7 @@ def : InstRW<[WLat1, FXa, NormalGr], (instregex "NC(G)?RK$")>;
471471
def : InstRW<[WLat1, FXa, NormalGr], (instregex "OC(G)?RK$")>;
472472
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NN(G)?RK$")>;
473473
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NO(G)?RK$")>;
474+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NOT(G)?R$")>;
474475
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NX(G)?RK$")>;
475476

476477
//===----------------------------------------------------------------------===//
@@ -530,9 +531,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
530531
def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
531532

532533
// Rotate and insert
533-
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
534534
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
535535
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
536+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?$")>;
536537
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
537538

538539
// Rotate and Select
@@ -1689,5 +1690,10 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
16891690
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
16901691
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
16911692

1693+
//===----------------------------------------------------------------------===//
1694+
// NOPs
1695+
//===----------------------------------------------------------------------===//
1696+
1697+
def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?$")>;
16921698
}
16931699

‎llvm/lib/Target/SystemZ/SystemZScheduleZ16.td

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -471,6 +471,7 @@ def : InstRW<[WLat1, FXa, NormalGr], (instregex "NC(G)?RK$")>;
471471
def : InstRW<[WLat1, FXa, NormalGr], (instregex "OC(G)?RK$")>;
472472
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NN(G)?RK$")>;
473473
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NO(G)?RK$")>;
474+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NOT(G)?R$")>;
474475
def : InstRW<[WLat1, FXa, NormalGr], (instregex "NX(G)?RK$")>;
475476

476477
//===----------------------------------------------------------------------===//
@@ -530,9 +531,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
530531
def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
531532

532533
// Rotate and insert
533-
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
534534
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
535535
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
536+
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?(Z)?$")>;
536537
def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
537538

538539
// Rotate and Select
@@ -1722,5 +1723,10 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
17221723
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
17231724
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
17241725

1726+
//===----------------------------------------------------------------------===//
1727+
// NOPs
1728+
//===----------------------------------------------------------------------===//
1729+
1730+
def : InstRW<[WLat1, FXb, NormalGr], (instregex "NOP(R)?$")>;
17251731
}
17261732

‎llvm/lib/Target/SystemZ/SystemZScheduleZ196.td

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -469,9 +469,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXU4, LSU, GroupAlone2],
469469
def : InstRW<[WLat2LSU, FXU, LSU, NormalGr], (instregex "RLL(G)?$")>;
470470

471471
// Rotate and insert
472-
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(32)?$")>;
473472
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBH(G|H|L)$")>;
474473
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBL(G|H|L)$")>;
474+
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(32)?(Z)?$")>;
475475
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBMux$")>;
476476

477477
// Rotate and Select
@@ -1235,5 +1235,10 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
12361236
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
12371237

1238+
//===----------------------------------------------------------------------===//
1239+
// NOPs
1240+
//===----------------------------------------------------------------------===//
1241+
1242+
def : InstRW<[WLat1, LSU, EndGroup], (instregex "NOP(R)?$")>;
12381243
}
12391244

‎llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -480,9 +480,9 @@ def : InstRW<[WLat5LSU, WLat5LSU, FXU4, LSU, GroupAlone2],
480480
def : InstRW<[WLat2LSU, FXU, LSU, NormalGr], (instregex "RLL(G)?$")>;
481481

482482
// Rotate and insert
483-
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(N|32)?$")>;
484483
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBH(G|H|L)$")>;
485484
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBL(G|H|L)$")>;
485+
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(N|32)?(Z)?$")>;
486486
def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBMux$")>;
487487

488488
// Rotate and Select
@@ -1280,5 +1280,10 @@ def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
12801280
def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
12811281
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
12821282

1283+
//===----------------------------------------------------------------------===//
1284+
// NOPs
1285+
//===----------------------------------------------------------------------===//
1286+
1287+
def : InstRW<[WLat1, LSU, NormalGr], (instregex "NOP(R)?$")>;
12831288
}
12841289

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