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arsenmarsenm
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Test merge
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2 files changed

+22
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‎llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll

Lines changed: 10 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -106,44 +106,33 @@ define {<vscale x 8 x i64>, <vscale x 8 x i64>} @vector_deinterleave_load_nxv8i6
106106
; CHECK-NEXT: addi sp, sp, -16
107107
; CHECK-NEXT: .cfi_def_cfa_offset 16
108108
; CHECK-NEXT: csrr a1, vlenb
109-
; CHECK-NEXT: slli a1, a1, 4
109+
; CHECK-NEXT: slli a1, a1, 3
110110
; CHECK-NEXT: sub sp, sp, a1
111-
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
111+
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
112112
; CHECK-NEXT: li a1, 85
113113
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
114114
; CHECK-NEXT: vmv.v.x v16, a1
115115
; CHECK-NEXT: csrr a1, vlenb
116-
; CHECK-NEXT: vl8re64.v v24, (a0)
116+
; CHECK-NEXT: vl8re64.v v0, (a0)
117117
; CHECK-NEXT: slli a1, a1, 3
118118
; CHECK-NEXT: add a0, a0, a1
119119
; CHECK-NEXT: li a1, 170
120-
; CHECK-NEXT: vl8re64.v v0, (a0)
120+
; CHECK-NEXT: vl8re64.v v24, (a0)
121121
; CHECK-NEXT: vmv.v.x v17, a1
122122
; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
123-
; CHECK-NEXT: vcompress.vm v8, v24, v16
123+
; CHECK-NEXT: vcompress.vm v8, v0, v16
124124
; CHECK-NEXT: vmv1r.v v12, v16
125125
; CHECK-NEXT: vmv1r.v v13, v17
126-
; CHECK-NEXT: vcompress.vm v16, v24, v13
127-
; CHECK-NEXT: vcompress.vm v24, v0, v12
128-
; CHECK-NEXT: addi a0, sp, 16
129-
; CHECK-NEXT: vs8r.v v24, (a0) # Unknown-size Folded Spill
130-
; CHECK-NEXT: vcompress.vm v24, v0, v13
131-
; CHECK-NEXT: csrr a0, vlenb
132-
; CHECK-NEXT: slli a0, a0, 3
133-
; CHECK-NEXT: add a0, sp, a0
134-
; CHECK-NEXT: addi a0, a0, 16
135-
; CHECK-NEXT: vs8r.v v24, (a0) # Unknown-size Folded Spill
126+
; CHECK-NEXT: vcompress.vm v16, v0, v13
127+
; CHECK-NEXT: vcompress.vm v0, v24, v12
136128
; CHECK-NEXT: addi a0, sp, 16
129+
; CHECK-NEXT: vs8r.v v0, (a0) # Unknown-size Folded Spill
130+
; CHECK-NEXT: vcompress.vm v0, v24, v13
137131
; CHECK-NEXT: vl8r.v v24, (a0) # Unknown-size Folded Reload
138132
; CHECK-NEXT: vmv4r.v v12, v24
133+
; CHECK-NEXT: vmv4r.v v20, v0
139134
; CHECK-NEXT: csrr a0, vlenb
140135
; CHECK-NEXT: slli a0, a0, 3
141-
; CHECK-NEXT: add a0, sp, a0
142-
; CHECK-NEXT: addi a0, a0, 16
143-
; CHECK-NEXT: vl8r.v v24, (a0) # Unknown-size Folded Reload
144-
; CHECK-NEXT: vmv4r.v v20, v24
145-
; CHECK-NEXT: csrr a0, vlenb
146-
; CHECK-NEXT: slli a0, a0, 4
147136
; CHECK-NEXT: add sp, sp, a0
148137
; CHECK-NEXT: .cfi_def_cfa sp, 16
149138
; CHECK-NEXT: addi sp, sp, 16

‎llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll

Lines changed: 12 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -184,9 +184,9 @@ define {<vscale x 8 x i64>, <vscale x 8 x i64>} @vector_deinterleave_nxv8i64_nxv
184184
; CHECK-NEXT: addi sp, sp, -16
185185
; CHECK-NEXT: .cfi_def_cfa_offset 16
186186
; CHECK-NEXT: csrr a0, vlenb
187-
; CHECK-NEXT: slli a0, a0, 4
187+
; CHECK-NEXT: slli a0, a0, 3
188188
; CHECK-NEXT: sub sp, sp, a0
189-
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
189+
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
190190
; CHECK-NEXT: li a0, 85
191191
; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
192192
; CHECK-NEXT: vmv.v.x v7, a0
@@ -200,25 +200,15 @@ define {<vscale x 8 x i64>, <vscale x 8 x i64>} @vector_deinterleave_nxv8i64_nxv
200200
; CHECK-NEXT: vcompress.vm v8, v16, v28
201201
; CHECK-NEXT: addi a0, sp, 16
202202
; CHECK-NEXT: vs8r.v v8, (a0) # Unknown-size Folded Spill
203-
; CHECK-NEXT: vcompress.vm v8, v16, v29
204-
; CHECK-NEXT: csrr a0, vlenb
205-
; CHECK-NEXT: slli a0, a0, 3
206-
; CHECK-NEXT: add a0, sp, a0
207-
; CHECK-NEXT: addi a0, a0, 16
208-
; CHECK-NEXT: vs8r.v v8, (a0) # Unknown-size Folded Spill
209-
; CHECK-NEXT: addi a0, sp, 16
203+
; CHECK-NEXT: vmv8r.v v8, v16
204+
; CHECK-NEXT: vcompress.vm v16, v8, v29
210205
; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
211206
; CHECK-NEXT: vmv4r.v v28, v8
212-
; CHECK-NEXT: csrr a0, vlenb
213-
; CHECK-NEXT: slli a0, a0, 3
214-
; CHECK-NEXT: add a0, sp, a0
215-
; CHECK-NEXT: addi a0, a0, 16
216-
; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
217-
; CHECK-NEXT: vmv4r.v v4, v8
207+
; CHECK-NEXT: vmv4r.v v4, v16
218208
; CHECK-NEXT: vmv8r.v v8, v24
219209
; CHECK-NEXT: vmv8r.v v16, v0
220210
; CHECK-NEXT: csrr a0, vlenb
221-
; CHECK-NEXT: slli a0, a0, 4
211+
; CHECK-NEXT: slli a0, a0, 3
222212
; CHECK-NEXT: add sp, sp, a0
223213
; CHECK-NEXT: .cfi_def_cfa sp, 16
224214
; CHECK-NEXT: addi sp, sp, 16
@@ -417,9 +407,9 @@ define {<vscale x 8 x double>, <vscale x 8 x double>} @vector_deinterleave_nxv8f
417407
; CHECK-NEXT: addi sp, sp, -16
418408
; CHECK-NEXT: .cfi_def_cfa_offset 16
419409
; CHECK-NEXT: csrr a0, vlenb
420-
; CHECK-NEXT: slli a0, a0, 4
410+
; CHECK-NEXT: slli a0, a0, 3
421411
; CHECK-NEXT: sub sp, sp, a0
422-
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
412+
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
423413
; CHECK-NEXT: li a0, 85
424414
; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
425415
; CHECK-NEXT: vmv.v.x v7, a0
@@ -433,25 +423,15 @@ define {<vscale x 8 x double>, <vscale x 8 x double>} @vector_deinterleave_nxv8f
433423
; CHECK-NEXT: vcompress.vm v8, v16, v28
434424
; CHECK-NEXT: addi a0, sp, 16
435425
; CHECK-NEXT: vs8r.v v8, (a0) # Unknown-size Folded Spill
436-
; CHECK-NEXT: vcompress.vm v8, v16, v29
437-
; CHECK-NEXT: csrr a0, vlenb
438-
; CHECK-NEXT: slli a0, a0, 3
439-
; CHECK-NEXT: add a0, sp, a0
440-
; CHECK-NEXT: addi a0, a0, 16
441-
; CHECK-NEXT: vs8r.v v8, (a0) # Unknown-size Folded Spill
442-
; CHECK-NEXT: addi a0, sp, 16
426+
; CHECK-NEXT: vmv8r.v v8, v16
427+
; CHECK-NEXT: vcompress.vm v16, v8, v29
443428
; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
444429
; CHECK-NEXT: vmv4r.v v28, v8
445-
; CHECK-NEXT: csrr a0, vlenb
446-
; CHECK-NEXT: slli a0, a0, 3
447-
; CHECK-NEXT: add a0, sp, a0
448-
; CHECK-NEXT: addi a0, a0, 16
449-
; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
450-
; CHECK-NEXT: vmv4r.v v4, v8
430+
; CHECK-NEXT: vmv4r.v v4, v16
451431
; CHECK-NEXT: vmv8r.v v8, v24
452432
; CHECK-NEXT: vmv8r.v v16, v0
453433
; CHECK-NEXT: csrr a0, vlenb
454-
; CHECK-NEXT: slli a0, a0, 4
434+
; CHECK-NEXT: slli a0, a0, 3
455435
; CHECK-NEXT: add sp, sp, a0
456436
; CHECK-NEXT: .cfi_def_cfa sp, 16
457437
; CHECK-NEXT: addi sp, sp, 16

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