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1 parent 0a8341f commit 0c809eaCopy full SHA for 0c809ea
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -207,6 +207,7 @@ getReservedRegs(const MachineFunction &MF) const {
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// Reserve hardware registers.
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Reserved.set(Mips::HWR29);
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+ Reserved.set(Mips::HWR2);
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// Reserve DSP control register.
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Reserved.set(Mips::DSPPos);
llvm/test/CodeGen/Mips/readcyclecounter.ll
@@ -7,8 +7,6 @@
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;RUN: llc -mtriple=mipsel -mcpu=mips2 < %s | FileCheck %s --check-prefix=MIPSEL_NOT_SUPPORTED
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;RUN: llc -mtriple=mips64el -mcpu=mips3 < %s | FileCheck %s --check-prefix=MIPS64EL_NOT_SUPPORTED
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-; XFAIL: expensive_checks
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-
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declare i64 @llvm.readcyclecounter() nounwind readnone
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define i64 @test_readcyclecounter() nounwind {
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