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[Mips] Support llvm.readcyclecounter intrinsic #127553
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The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $2, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/16/builds/13921 Here is the relevant piece of the build log for the reference
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Oh, it happens again: I guess that it means that we need |
OK, I would try. Thanks! |
I mark it as XFAIL for now. When you fix this problem, please revert it. |
Fix pr llvm#127553. x86_64 failed to run readcyclecounter.ll when enable expensive_check, it would error "Using an undefined physical register".
Fix pr #127553. x86_64 failed to run readcyclecounter.ll when enable expensive_check, it would error "Using an undefined physical register".
Fix pr llvm/llvm-project#127553. x86_64 failed to run readcyclecounter.ll when enable expensive_check, it would error "Using an undefined physical register".
The llvm.readcyclecounter intrinsic can be implemented via the
rdhwr $2, $hwr_cc
instruction.$hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register.
Fix #106318.