@@ -17,9 +17,7 @@ typedef __SIZE_TYPE__ size_t;
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// BOTH-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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// BOTH-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
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// BOTH-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
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- // BOTH-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
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- // BOTH-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
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- // BOTH-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
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+ // BOTH-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 %0, i1 true)
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// BOTH-NEXT: ret i32 [[ABS]]
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signed int testabs (signed int a ) {
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return __abs (a );
@@ -30,19 +28,15 @@ signed int testabs(signed int a) {
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// 64BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
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// 64BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
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// 64BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
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- // 64BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
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- // 64BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
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- // 64BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
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+ // 64BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
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// 64BIT-NEXT: ret i64 [[ABS]]
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//
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// 32BIT-LABEL: @testlabs(
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// 32BIT-NEXT: entry:
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// 32BIT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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// 32BIT-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
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// 32BIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
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- // 32BIT-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
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- // 32BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
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- // 32BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
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+ // 32BIT-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[TMP0]], i1 true)
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// 32BIT-NEXT: ret i32 [[ABS]]
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//
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signed long testlabs (signed long a ) {
@@ -54,19 +48,15 @@ signed long testlabs(signed long a) {
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// 64BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
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// 64BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
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// 64BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
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- // 64BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
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- // 64BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
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- // 64BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
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+ // 64BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
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// 64BIT-NEXT: ret i64 [[ABS]]
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//
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// 32BIT-LABEL: @testllabs(
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// 32BIT-NEXT: entry:
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// 32BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
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// 32BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
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// 32BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
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- // 32BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
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- // 32BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
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- // 32BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
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+ // 32BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
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// 32BIT-NEXT: ret i64 [[ABS]]
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//
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signed long long testllabs (signed long long a ) {
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