@@ -3856,29 +3856,6 @@ def int_aarch64_sve_famin_u : AdvSIMD_Pred2VectorArg_Intrinsic;
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def int_aarch64_neon_famax : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_famin : AdvSIMD_2VectorArg_Intrinsic;
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-
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- // SME FP8 FDOT intrinsics
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- let TargetPrefix = "aarch64" in {
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-
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- class SME2_FP8_FDOT_MULTI_VG1x2 :
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- DefaultAttrsIntrinsic<[], [llvm_i32_ty,
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- llvm_nxv16i8_ty, llvm_nxv16i8_ty,
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- llvm_nxv16i8_ty, llvm_nxv16i8_ty],
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- [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
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-
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- class SME2_FP8_FDOT_MULTI_VG1x4 :
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- DefaultAttrsIntrinsic<[], [llvm_i32_ty,
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- llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty,
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- llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty],
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- [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
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-
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- def int_aarch64_sme_fp8_fdot_multi_za16_vg1x2 : SME2_FP8_FDOT_MULTI_VG1x2;
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- def int_aarch64_sme_fp8_fdot_multi_za16_vg1x4 : SME2_FP8_FDOT_MULTI_VG1x4;
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-
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- def int_aarch64_sme_fp8_fdot_multi_za32_vg1x2 : SME2_FP8_FDOT_MULTI_VG1x2;
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- def int_aarch64_sme_fp8_fdot_multi_za32_vg1x4 : SME2_FP8_FDOT_MULTI_VG1x4;
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- }
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-
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//
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// FP8 Intrinsics
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//
@@ -4079,6 +4056,12 @@ let TargetPrefix = "aarch64" in {
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def int_aarch64_sme_fp8_fdot_single_za16_vg1x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
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def int_aarch64_sme_fp8_fdot_single_za32_vg1x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
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+ // Multi
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+ def int_aarch64_sme_fp8_fdot_multi_za16_vg1x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
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+ def int_aarch64_sme_fp8_fdot_multi_za32_vg1x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
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+
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+ def int_aarch64_sme_fp8_fdot_multi_za16_vg1x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
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+ def int_aarch64_sme_fp8_fdot_multi_za32_vg1x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
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// FVDOT
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def int_aarch64_sme_fp8_fvdot_lane_za16_vg1x2 : SME_FP8_ZA_LANE_VGx2_Intrinsic;
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