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ahmedbougachaahmedbougacha
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[AArch64] Add FPAC to apple- processors that have it. (#102072)
We added FPAC recently in d7e8a74 to allow ptrauth codegen to rely on the cpu auth failure checks rather than emitting its own auth failure check/brk sequence. Add it to the Apple processors that do have it: A15, A16, A17, M4. While there, tweak the description to refer to Armv8.3-A rather than v8.3-A, matching the other features.
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‎clang/test/Driver/print-enabled-extensions/aarch64-apple-a15.c

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Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-apple-a17.c

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Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
2829
// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎llvm/lib/Target/AArch64/AArch64Features.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@ def FeatureJS : ExtensionWithMArch<"jsconv", "JS", "FEAT_JSCVT",
186186
[FeatureFPARMv8]>;
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def FeatureFPAC : Extension<"fpac", "FPAC", "FEAT_FPAC",
189-
"Enable v8.3-A Pointer Authentication Faulting enhancement">;
189+
"Enable Armv8.3-A Pointer Authentication Faulting enhancement">;
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191191
def FeatureCCIDX : Extension<"ccidx", "CCIDX", "FEAT_CCIDX",
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"Enable Armv8.3-A Extend of the CCSIDR number of sets">;

‎llvm/lib/Target/AArch64/AArch64Processors.td

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -863,31 +863,35 @@ def ProcessorFeatures {
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list<SubtargetFeature> AppleA15 = [HasV8_6aOps, FeatureSHA2, FeatureAES, FeatureFPARMv8,
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FeatureNEON, FeaturePerfMon, FeatureSHA3,
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FeatureFullFP16, FeatureFP16FML,
866-
FeatureComplxNum, FeatureCRC, FeatureJS, FeatureLSE,
867-
FeaturePAuth, FeatureRAS, FeatureRCPC, FeatureRDM,
866+
FeatureComplxNum, FeatureCRC, FeatureJS,
867+
FeatureLSE, FeaturePAuth, FeatureFPAC,
868+
FeatureRAS, FeatureRCPC, FeatureRDM,
868869
FeatureBF16, FeatureDotProd, FeatureMatMulInt8];
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list<SubtargetFeature> AppleA16 = [HasV8_6aOps, FeatureSHA2, FeatureAES, FeatureFPARMv8,
870871
FeatureNEON, FeaturePerfMon, FeatureSHA3,
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FeatureFullFP16, FeatureFP16FML,
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FeatureHCX,
873-
FeatureComplxNum, FeatureCRC, FeatureJS, FeatureLSE,
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FeaturePAuth, FeatureRAS, FeatureRCPC, FeatureRDM,
874+
FeatureComplxNum, FeatureCRC, FeatureJS,
875+
FeatureLSE, FeaturePAuth, FeatureFPAC,
876+
FeatureRAS, FeatureRCPC, FeatureRDM,
875877
FeatureBF16, FeatureDotProd, FeatureMatMulInt8];
876878
list<SubtargetFeature> AppleA17 = [HasV8_6aOps, FeatureSHA2, FeatureAES, FeatureFPARMv8,
877879
FeatureNEON, FeaturePerfMon, FeatureSHA3,
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FeatureFullFP16, FeatureFP16FML,
879881
FeatureHCX,
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FeatureComplxNum, FeatureCRC, FeatureJS, FeatureLSE,
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FeaturePAuth, FeatureRAS, FeatureRCPC, FeatureRDM,
882+
FeatureComplxNum, FeatureCRC, FeatureJS,
883+
FeatureLSE, FeaturePAuth, FeatureFPAC,
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FeatureRAS, FeatureRCPC, FeatureRDM,
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FeatureBF16, FeatureDotProd, FeatureMatMulInt8];
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list<SubtargetFeature> AppleM4 = [HasV9_2aOps, FeatureSHA2, FeatureFPARMv8,
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FeatureNEON, FeaturePerfMon, FeatureSHA3,
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FeatureFullFP16, FeatureFP16FML,
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FeatureAES, FeatureBF16,
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FeatureSME, FeatureSME2,
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FeatureSMEF64F64, FeatureSMEI16I64,
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FeatureComplxNum, FeatureCRC, FeatureJS, FeatureLSE,
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FeaturePAuth, FeatureRAS, FeatureRCPC, FeatureRDM,
892+
FeatureComplxNum, FeatureCRC, FeatureJS,
893+
FeatureLSE, FeaturePAuth, FeatureFPAC,
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FeatureRAS, FeatureRCPC, FeatureRDM,
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FeatureDotProd, FeatureMatMulInt8];
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list<SubtargetFeature> ExynosM3 = [HasV8_0aOps, FeatureCRC, FeatureSHA2, FeatureAES,
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FeaturePerfMon, FeatureNEON, FeatureFPARMv8];

‎llvm/unittests/TargetParser/TargetParserTest.cpp

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1591,7 +1591,7 @@ INSTANTIATE_TEST_SUITE_P(
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AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
15921592
AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16,
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AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
1594-
AArch64::AEK_PAUTH, AArch64::AEK_PERFMON}),
1594+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC, AArch64::AEK_PERFMON}),
15951595
AArch64CPUTestParams(
15961596
"apple-m2", "armv8.6-a",
15971597
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
@@ -1600,7 +1600,7 @@ INSTANTIATE_TEST_SUITE_P(
16001600
AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
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AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16,
16021602
AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
1603-
AArch64::AEK_PAUTH, AArch64::AEK_PERFMON}),
1603+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC, AArch64::AEK_PERFMON}),
16041604
AArch64CPUTestParams(
16051605
"apple-a16", "armv8.6-a",
16061606
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
@@ -1609,7 +1609,8 @@ INSTANTIATE_TEST_SUITE_P(
16091609
AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
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AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16,
16111611
AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
1612-
AArch64::AEK_PAUTH, AArch64::AEK_PERFMON, AArch64::AEK_HCX}),
1612+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC, AArch64::AEK_PERFMON,
1613+
AArch64::AEK_HCX}),
16131614
AArch64CPUTestParams(
16141615
"apple-m3", "armv8.6-a",
16151616
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
@@ -1618,7 +1619,8 @@ INSTANTIATE_TEST_SUITE_P(
16181619
AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
16191620
AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16,
16201621
AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
1621-
AArch64::AEK_PAUTH, AArch64::AEK_PERFMON, AArch64::AEK_HCX}),
1622+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC, AArch64::AEK_PERFMON,
1623+
AArch64::AEK_HCX}),
16221624
AArch64CPUTestParams(
16231625
"apple-a17", "armv8.6-a",
16241626
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
@@ -1627,7 +1629,8 @@ INSTANTIATE_TEST_SUITE_P(
16271629
AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
16281630
AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16,
16291631
AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
1630-
AArch64::AEK_PAUTH, AArch64::AEK_PERFMON, AArch64::AEK_HCX}),
1632+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC, AArch64::AEK_PERFMON,
1633+
AArch64::AEK_HCX}),
16311634
AArch64CPUTestParams("apple-m4", "armv9.2-a",
16321635
{AArch64::AEK_CRC, AArch64::AEK_AES,
16331636
AArch64::AEK_SHA2, AArch64::AEK_SHA3,
@@ -1637,10 +1640,10 @@ INSTANTIATE_TEST_SUITE_P(
16371640
AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
16381641
AArch64::AEK_FP16FML, AArch64::AEK_BF16,
16391642
AArch64::AEK_I8MM, AArch64::AEK_JSCVT,
1640-
AArch64::AEK_FCMA, AArch64::AEK_PAUTH,
1643+
AArch64::AEK_PAUTH, AArch64::AEK_FPAC,
1644+
AArch64::AEK_FCMA, AArch64::AEK_PERFMON,
16411645
AArch64::AEK_SME, AArch64::AEK_SME2,
1642-
AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64,
1643-
AArch64::AEK_PERFMON}),
1646+
AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64}),
16441647
AArch64CPUTestParams("exynos-m3", "armv8-a",
16451648
{AArch64::AEK_CRC, AArch64::AEK_AES,
16461649
AArch64::AEK_SHA2, AArch64::AEK_FP,

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