Remove NDEBUG gating around assertions

Author: lukel97

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

@@ -2100,15 +2100,13 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
     // Establish the correct scalable-vector types for any fixed-length type.
     if (SubVecVT.isFixedLengthVector()) {
       SubVecContainerVT = TLI.getContainerForFixedLengthVector(SubVecVT);
-#ifndef NDEBUG
       TypeSize VecRegSize = TypeSize::getScalable(RISCV::RVVBitsPerBlock);
       [[maybe_unused]] bool ExactlyVecRegSized =
           Subtarget->expandVScale(SubVecVT.getSizeInBits())
               .isKnownMultipleOf(Subtarget->expandVScale(VecRegSize));
       assert(isPowerOf2_64(Subtarget->expandVScale(SubVecVT.getSizeInBits())
                                .getKnownMinValue()));
       assert(Idx == 0 && (ExactlyVecRegSized || V.isUndef()));
-#endif
     }
     MVT ContainerVT = VT;
     if (VT.isFixedLengthVector())