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[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)
Since #72467, `@plt` in assembly output "call foo@plt" is omitted. We can trivially merge MO_PLT and MO_CALL without any functional change to assembly/relocatable file output. Earlier architectures use different call relocation types whether a PLT is potentially needed: R_386_PLT32/R_386_PC32, R_68K_PLT32/R_68K_PC32, R_SPARC_WDISP30/R_SPARC_WPLT320. However, as the PLT property is per-symbol instead of per-call-site and linkers can optimize out a PLT, the distinction has been confusing. Arm made good names R_ARM_CALL/R_AARCH64_CALL. Let's use MO_CALL instead of MO_PLT. As follow-ups, we can merge fixup_riscv_call/fixup_riscv_call_plt and VK_RISCV_CALL/VK_RISCV_CALL_PLT.
1 parent eabaee0 commit 360996a

37 files changed

+267
-283
lines changed

‎llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -579,7 +579,7 @@ bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
579579

580580
// Select the recommended relocation type R_RISCV_CALL_PLT.
581581
if (!Info.Callee.isReg())
582-
Info.Callee.setTargetFlags(RISCVII::MO_PLT);
582+
Info.Callee.setTargetFlags(RISCVII::MO_CALL);
583583

584584
MachineInstrBuilder Call =
585585
MIRBuilder

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -254,7 +254,6 @@ static inline bool isFirstDefTiedToFirstUse(const MCInstrDesc &Desc) {
254254
enum {
255255
MO_None = 0,
256256
MO_CALL = 1,
257-
MO_PLT = 2,
258257
MO_LO = 3,
259258
MO_HI = 4,
260259
MO_PCREL_LO = 5,

‎llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -747,9 +747,6 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
747747
Kind = RISCVMCExpr::VK_RISCV_None;
748748
break;
749749
case RISCVII::MO_CALL:
750-
Kind = RISCVMCExpr::VK_RISCV_CALL;
751-
break;
752-
case RISCVII::MO_PLT:
753750
Kind = RISCVMCExpr::VK_RISCV_CALL_PLT;
754751
break;
755752
case RISCVII::MO_LO:

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -18215,20 +18215,9 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
1821518215
// split it and then direct call can be matched by PseudoCALL.
1821618216
if (GlobalAddressSDNode *S = dyn_cast<GlobalAddressSDNode>(Callee)) {
1821718217
const GlobalValue *GV = S->getGlobal();
18218-
18219-
unsigned OpFlags = RISCVII::MO_CALL;
18220-
if (!getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV))
18221-
OpFlags = RISCVII::MO_PLT;
18222-
18223-
Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, OpFlags);
18218+
Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, RISCVII::MO_CALL);
1822418219
} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
18225-
unsigned OpFlags = RISCVII::MO_CALL;
18226-
18227-
if (!getTargetMachine().shouldAssumeDSOLocal(*MF.getFunction().getParent(),
18228-
nullptr))
18229-
OpFlags = RISCVII::MO_PLT;
18230-
18231-
Callee = DAG.getTargetExternalSymbol(S->getSymbol(), PtrVT, OpFlags);
18220+
Callee = DAG.getTargetExternalSymbol(S->getSymbol(), PtrVT, RISCVII::MO_CALL);
1823218221
}
1823318222

1823418223
// The first call operand is the chain and the second is the target address.

‎llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2365,7 +2365,6 @@ RISCVInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
23652365
using namespace RISCVII;
23662366
static const std::pair<unsigned, const char *> TargetFlags[] = {
23672367
{MO_CALL, "riscv-call"},
2368-
{MO_PLT, "riscv-plt"},
23692368
{MO_LO, "riscv-lo"},
23702369
{MO_HI, "riscv-hi"},
23712370
{MO_PCREL_LO, "riscv-pcrel-lo"},

‎llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ define i32 @caller_double_in_regs() nounwind {
4040
; ILP32-NEXT: $x10 = COPY [[C]](s32)
4141
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
4242
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
43-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
43+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
4444
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
4545
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
4646
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
@@ -55,7 +55,7 @@ define i32 @caller_double_in_regs() nounwind {
5555
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
5656
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
5757
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
58-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
58+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
5959
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
6060
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
6161
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -79,7 +79,7 @@ define i64 @caller_small_scalar_ret() nounwind {
7979
; ILP32-LABEL: name: caller_small_scalar_ret
8080
; ILP32: bb.1 (%ir-block.0):
8181
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
82-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
82+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
8383
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
8484
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
8585
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -92,7 +92,7 @@ define i64 @caller_small_scalar_ret() nounwind {
9292
; ILP32F-LABEL: name: caller_small_scalar_ret
9393
; ILP32F: bb.1 (%ir-block.0):
9494
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
95-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
95+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
9696
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
9797
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
9898
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11

‎llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ define i32 @caller_i64_in_regs() nounwind {
4444
; ILP32-NEXT: $x10 = COPY [[C]](s32)
4545
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
4646
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
47-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
47+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
4848
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
4949
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
5050
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
@@ -59,7 +59,7 @@ define i32 @caller_i64_in_regs() nounwind {
5959
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
6060
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
6161
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
62-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
62+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
6363
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
6464
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
6565
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -74,7 +74,7 @@ define i32 @caller_i64_in_regs() nounwind {
7474
; ILP32D-NEXT: $x10 = COPY [[C]](s32)
7575
; ILP32D-NEXT: $x11 = COPY [[UV]](s32)
7676
; ILP32D-NEXT: $x12 = COPY [[UV1]](s32)
77-
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
77+
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
7878
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
7979
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
8080
; ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -162,7 +162,7 @@ define i32 @caller_many_scalars() nounwind {
162162
; ILP32-NEXT: $x15 = COPY [[C4]](s32)
163163
; ILP32-NEXT: $x16 = COPY [[C5]](s32)
164164
; ILP32-NEXT: $x17 = COPY [[UV2]](s32)
165-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
165+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
166166
; ILP32-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
167167
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
168168
; ILP32-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -198,7 +198,7 @@ define i32 @caller_many_scalars() nounwind {
198198
; ILP32F-NEXT: $x15 = COPY [[C4]](s32)
199199
; ILP32F-NEXT: $x16 = COPY [[C5]](s32)
200200
; ILP32F-NEXT: $x17 = COPY [[UV2]](s32)
201-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
201+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
202202
; ILP32F-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
203203
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
204204
; ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -234,7 +234,7 @@ define i32 @caller_many_scalars() nounwind {
234234
; ILP32D-NEXT: $x15 = COPY [[C4]](s32)
235235
; ILP32D-NEXT: $x16 = COPY [[C5]](s32)
236236
; ILP32D-NEXT: $x17 = COPY [[UV2]](s32)
237-
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
237+
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
238238
; ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
239239
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
240240
; ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -261,7 +261,7 @@ define i32 @caller_small_scalar_ret() nounwind {
261261
; ILP32: bb.1 (%ir-block.0):
262262
; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
263263
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
264-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
264+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
265265
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
266266
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
267267
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -275,7 +275,7 @@ define i32 @caller_small_scalar_ret() nounwind {
275275
; ILP32F: bb.1 (%ir-block.0):
276276
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
277277
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
278-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
278+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
279279
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
280280
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
281281
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -289,7 +289,7 @@ define i32 @caller_small_scalar_ret() nounwind {
289289
; ILP32D: bb.1 (%ir-block.0):
290290
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
291291
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
292-
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
292+
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
293293
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
294294
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
295295
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -323,7 +323,7 @@ define i32 @caller_small_struct_ret() nounwind {
323323
; ILP32-LABEL: name: caller_small_struct_ret
324324
; ILP32: bb.1 (%ir-block.0):
325325
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
326-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
326+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
327327
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
328328
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
329329
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -335,7 +335,7 @@ define i32 @caller_small_struct_ret() nounwind {
335335
; ILP32F-LABEL: name: caller_small_struct_ret
336336
; ILP32F: bb.1 (%ir-block.0):
337337
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
338-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
338+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
339339
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
340340
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
341341
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -347,7 +347,7 @@ define i32 @caller_small_struct_ret() nounwind {
347347
; ILP32D-LABEL: name: caller_small_struct_ret
348348
; ILP32D: bb.1 (%ir-block.0):
349349
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
350-
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
350+
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
351351
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
352352
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
353353
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -404,7 +404,7 @@ define i32 @caller_large_struct_ret() nounwind {
404404
; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
405405
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
406406
; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
407-
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
407+
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
408408
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
409409
; ILP32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
410410
; ILP32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
@@ -419,7 +419,7 @@ define i32 @caller_large_struct_ret() nounwind {
419419
; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
420420
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
421421
; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
422-
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
422+
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
423423
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
424424
; ILP32F-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
425425
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
@@ -434,7 +434,7 @@ define i32 @caller_large_struct_ret() nounwind {
434434
; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
435435
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
436436
; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
437-
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
437+
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
438438
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
439439
; ILP32D-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
440440
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12

‎llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ define i32 @caller_float_in_regs() nounwind {
3131
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
3232
; RV32I-NEXT: $x10 = COPY [[C]](s32)
3333
; RV32I-NEXT: $x11 = COPY [[C1]](s32)
34-
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
34+
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
3535
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
3636
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
3737
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
@@ -94,7 +94,7 @@ define i32 @caller_float_on_stack() nounwind {
9494
; RV32I-NEXT: $x15 = COPY [[UV5]](s32)
9595
; RV32I-NEXT: $x16 = COPY [[UV6]](s32)
9696
; RV32I-NEXT: $x17 = COPY [[UV7]](s32)
97-
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
97+
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
9898
; RV32I-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
9999
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
100100
; RV32I-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -116,7 +116,7 @@ define i32 @caller_tiny_scalar_ret() nounwind {
116116
; RV32I-LABEL: name: caller_tiny_scalar_ret
117117
; RV32I: bb.1 (%ir-block.0):
118118
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
119-
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
119+
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
120120
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
121121
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
122122
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)

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