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[RISCV] Improve splatPartsI64WithVL for vlmax scalable vector constants where Hi and Lo are the same.
We can use a 32-bit splat and bitcast to i64 vector. This only handles the case where we are using vlmax so that the new vl is cheap to compute. This could be generalized to double the VL. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D158879
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3559,9 +3559,11 @@ static SDValue splatPartsI64WithVL(const SDLoc &DL, MVT VT, SDValue Passthru,
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if ((LoC >> 31) == HiC)
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return DAG.getNode(RISCVISD::VMV_V_X_VL, DL, VT, Passthru, Lo, VL);
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3562-
// If vl is equal to XLEN_MAX and Hi constant is equal to Lo, we could use
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// If vl is equal to VLMAX and Hi constant is equal to Lo, we could use
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// vmv.v.x whose EEW = 32 to lower it.
3564-
if (LoC == HiC && isAllOnesConstant(VL)) {
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if (LoC == HiC && (isAllOnesConstant(VL) ||
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(isa<RegisterSDNode>(VL) &&
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cast<RegisterSDNode>(VL)->getReg() == RISCV::X0))) {
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MVT InterVT = MVT::getVectorVT(MVT::i32, VT.getVectorElementCount() * 2);
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// TODO: if vl <= min(VLMAX), we can also do this. But we could not
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// access the subtarget here now.

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