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FreddyLeafFreddyLeaf
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[X86] Support DomainReassignment for APX NDD instructions (#85737)
1 parent a2dfc9a commit 3e4caa9

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2 files changed

+69
-31
lines changed

2 files changed

+69
-31
lines changed

‎llvm/lib/Target/X86/X86DomainReassignment.cpp

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -650,6 +650,16 @@ void X86DomainReassignment::initConverters() {
650650
createReplacer(X86::AND16rr, X86::KANDWrr);
651651
createReplacer(X86::XOR16rr, X86::KXORWrr);
652652

653+
bool HasNDD = STI->hasNDD();
654+
if (HasNDD) {
655+
createReplacer(X86::SHR16ri_ND, X86::KSHIFTRWri);
656+
createReplacer(X86::SHL16ri_ND, X86::KSHIFTLWri);
657+
createReplacer(X86::NOT16r_ND, X86::KNOTWrr);
658+
createReplacer(X86::OR16rr_ND, X86::KORWrr);
659+
createReplacer(X86::AND16rr_ND, X86::KANDWrr);
660+
createReplacer(X86::XOR16rr_ND, X86::KXORWrr);
661+
}
662+
653663
if (STI->hasBWI()) {
654664
createReplacer(X86::MOV32rm, GET_EGPR_IF_ENABLED(X86::KMOVDkm));
655665
createReplacer(X86::MOV64rm, GET_EGPR_IF_ENABLED(X86::KMOVQkm));
@@ -684,6 +694,23 @@ void X86DomainReassignment::initConverters() {
684694
createReplacer(X86::XOR32rr, X86::KXORDrr);
685695
createReplacer(X86::XOR64rr, X86::KXORQrr);
686696

697+
if (HasNDD) {
698+
createReplacer(X86::SHR32ri_ND, X86::KSHIFTRDri);
699+
createReplacer(X86::SHL32ri_ND, X86::KSHIFTLDri);
700+
createReplacer(X86::ADD32rr_ND, X86::KADDDrr);
701+
createReplacer(X86::NOT32r_ND, X86::KNOTDrr);
702+
createReplacer(X86::OR32rr_ND, X86::KORDrr);
703+
createReplacer(X86::AND32rr_ND, X86::KANDDrr);
704+
createReplacer(X86::XOR32rr_ND, X86::KXORDrr);
705+
createReplacer(X86::SHR64ri_ND, X86::KSHIFTRQri);
706+
createReplacer(X86::SHL64ri_ND, X86::KSHIFTLQri);
707+
createReplacer(X86::ADD64rr_ND, X86::KADDQrr);
708+
createReplacer(X86::NOT64r_ND, X86::KNOTQrr);
709+
createReplacer(X86::OR64rr_ND, X86::KORQrr);
710+
createReplacer(X86::AND64rr_ND, X86::KANDQrr);
711+
createReplacer(X86::XOR64rr_ND, X86::KXORQrr);
712+
}
713+
687714
// TODO: KTEST is not a replacement for TEST due to flag differences. Need
688715
// to prove only Z flag is used.
689716
// createReplacer(X86::TEST32rr, X86::KTESTDrr);
@@ -713,6 +740,17 @@ void X86DomainReassignment::initConverters() {
713740
// createReplacer(X86::TEST16rr, X86::KTESTWrr);
714741

715742
createReplacer(X86::XOR8rr, X86::KXORBrr);
743+
744+
if (HasNDD) {
745+
createReplacer(X86::ADD8rr_ND, X86::KADDBrr);
746+
createReplacer(X86::ADD16rr_ND, X86::KADDWrr);
747+
createReplacer(X86::AND8rr_ND, X86::KANDBrr);
748+
createReplacer(X86::NOT8r_ND, X86::KNOTBrr);
749+
createReplacer(X86::OR8rr_ND, X86::KORBrr);
750+
createReplacer(X86::SHR8ri_ND, X86::KSHIFTRBri);
751+
createReplacer(X86::SHL8ri_ND, X86::KSHIFTLBri);
752+
createReplacer(X86::XOR8rr_ND, X86::KXORBrr);
753+
}
716754
}
717755
#undef GET_EGPR_IF_ENABLED
718756
}

‎llvm/test/CodeGen/X86/apx/domain-reassignment.mir

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -run-pass x86-domain-reassignment -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq -o - %s | FileCheck %s
2+
# RUN: llc -run-pass x86-domain-reassignment -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+ndd -o - %s | FileCheck %s
33
--- |
44
; ModuleID = '../test/CodeGen/X86/gpr-to-mask.ll'
55
source_filename = "../test/CodeGen/X86/gpr-to-mask.ll"
@@ -302,13 +302,13 @@ body: |
302302
%6 = COPY %5
303303
%7 = COPY %6.sub_8bit
304304
305-
%12 = SHR8ri %7, 2, implicit-def dead $eflags
306-
%13 = SHL8ri %12, 1, implicit-def dead $eflags
307-
%14 = NOT8r %13
308-
%15 = OR8rr %14, %12, implicit-def dead $eflags
309-
%16 = AND8rr %15, %13, implicit-def dead $eflags
310-
%17 = XOR8rr %16, %12, implicit-def dead $eflags
311-
%18 = ADD8rr %17, %14, implicit-def dead $eflags
305+
%12 = SHR8ri_ND %7, 2, implicit-def dead $eflags
306+
%13 = SHL8ri_ND %12, 1, implicit-def dead $eflags
307+
%14 = NOT8r_ND %13
308+
%15 = OR8rr_ND %14, %12, implicit-def dead $eflags
309+
%16 = AND8rr_ND %15, %13, implicit-def dead $eflags
310+
%17 = XOR8rr_ND %16, %12, implicit-def dead $eflags
311+
%18 = ADD8rr_ND %17, %14, implicit-def dead $eflags
312312
313313
%8 = IMPLICIT_DEF
314314
%9 = INSERT_SUBREG %8, %18, %subreg.sub_8bit_hi
@@ -421,12 +421,12 @@ body: |
421421
%6 = COPY %5
422422
%7 = COPY %6.sub_16bit
423423
424-
%12 = SHR16ri %7, 2, implicit-def dead $eflags
425-
%13 = SHL16ri %12, 1, implicit-def dead $eflags
426-
%14 = NOT16r %13
427-
%15 = OR16rr %14, %12, implicit-def dead $eflags
428-
%16 = AND16rr %15, %13, implicit-def dead $eflags
429-
%17 = XOR16rr %16, %12, implicit-def dead $eflags
424+
%12 = SHR16ri_ND %7, 2, implicit-def dead $eflags
425+
%13 = SHL16ri_ND %12, 1, implicit-def dead $eflags
426+
%14 = NOT16r_ND %13
427+
%15 = OR16rr_ND %14, %12, implicit-def dead $eflags
428+
%16 = AND16rr_ND %15, %13, implicit-def dead $eflags
429+
%17 = XOR16rr_ND %16, %12, implicit-def dead $eflags
430430
431431
%8 = IMPLICIT_DEF
432432
%9 = INSERT_SUBREG %8, %17, %subreg.sub_16bit
@@ -524,14 +524,14 @@ body: |
524524
%2 = COPY $zmm1
525525
526526
%5 = MOV32rm %0, 1, $noreg, 0, $noreg
527-
%6 = SHR32ri %5, 2, implicit-def dead $eflags
528-
%7 = SHL32ri %6, 1, implicit-def dead $eflags
529-
%8 = NOT32r %7
530-
%9 = OR32rr %8, %6, implicit-def dead $eflags
531-
%10 = AND32rr %9, %7, implicit-def dead $eflags
532-
%11 = XOR32rr %10, %6, implicit-def dead $eflags
527+
%6 = SHR32ri_ND %5, 2, implicit-def dead $eflags
528+
%7 = SHL32ri_ND %6, 1, implicit-def dead $eflags
529+
%8 = NOT32r_ND %7
530+
%9 = OR32rr_ND %8, %6, implicit-def dead $eflags
531+
%10 = AND32rr_ND %9, %7, implicit-def dead $eflags
532+
%11 = XOR32rr_ND %10, %6, implicit-def dead $eflags
533533
%12 = ANDN32rr %11, %9, implicit-def dead $eflags
534-
%13 = ADD32rr %12, %11, implicit-def dead $eflags
534+
%13 = ADD32rr_ND %12, %11, implicit-def dead $eflags
535535
536536
%3 = COPY %13
537537
%4 = VMOVDQU16Zrrk %2, killed %3, %1
@@ -627,14 +627,14 @@ body: |
627627
%2 = COPY $zmm1
628628
629629
%5 = MOV64rm %0, 1, $noreg, 0, $noreg
630-
%6 = SHR64ri %5, 2, implicit-def dead $eflags
631-
%7 = SHL64ri %6, 1, implicit-def dead $eflags
632-
%8 = NOT64r %7
633-
%9 = OR64rr %8, %6, implicit-def dead $eflags
634-
%10 = AND64rr %9, %7, implicit-def dead $eflags
635-
%11 = XOR64rr %10, %6, implicit-def dead $eflags
630+
%6 = SHR64ri_ND %5, 2, implicit-def dead $eflags
631+
%7 = SHL64ri_ND %6, 1, implicit-def dead $eflags
632+
%8 = NOT64r_ND %7
633+
%9 = OR64rr_ND %8, %6, implicit-def dead $eflags
634+
%10 = AND64rr_ND %9, %7, implicit-def dead $eflags
635+
%11 = XOR64rr_ND %10, %6, implicit-def dead $eflags
636636
%12 = ANDN64rr %11, %9, implicit-def dead $eflags
637-
%13 = ADD64rr %12, %11, implicit-def dead $eflags
637+
%13 = ADD64rr_ND %12, %11, implicit-def dead $eflags
638638
639639
%3 = COPY %13
640640
%4 = VMOVDQU8Zrrk %2, killed %3, %1
@@ -712,7 +712,7 @@ body: |
712712
%2 = COPY $zmm1
713713
714714
%5 = MOVZX16rm8 %0, 1, $noreg, 0, $noreg
715-
%6 = NOT16r %5
715+
%6 = NOT16r_ND %5
716716
717717
%3 = COPY %6
718718
%4 = VMOVAPSZrrk %2, killed %3, %1
@@ -785,7 +785,7 @@ body: |
785785
786786
%5 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg
787787
%6 = MOVZX32rm16 %0, 1, $noreg, 0, $noreg
788-
%7 = ADD32rr %5, %6, implicit-def dead $eflags
788+
%7 = ADD32rr_ND %5, %6, implicit-def dead $eflags
789789
790790
%3 = COPY %7
791791
%4 = VMOVDQU16Zrrk %2, killed %3, %1
@@ -858,7 +858,7 @@ body: |
858858
859859
%5 = MOVZX64rm8 %0, 1, $noreg, 0, $noreg
860860
%6 = MOVZX64rm16 %0, 1, $noreg, 0, $noreg
861-
%7 = ADD64rr %5, %6, implicit-def dead $eflags
861+
%7 = ADD64rr_ND %5, %6, implicit-def dead $eflags
862862
863863
%3 = COPY %7
864864
%4 = VMOVDQU8Zrrk %2, killed %3, %1

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