Made changes to get rid of generic changes & addressed the required changes in comments and test files.

Author: vg0204

llvm/include/llvm/CodeGen/Passes.h

@@ -283,7 +283,7 @@ namespace llvm {
   /// critical-path and resource depth.
   extern char &MachineCombinerID;
 
-  /// StackColoring - This pass performs stack coloring and merging.
+  /// StackSlotColoring - This pass performs stack coloring and merging.
   /// It merges disjoint allocas to reduce the stack size.
   extern char &StackColoringID;
 

llvm/lib/CodeGen/StackSlotColoring.cpp

@@ -13,7 +13,6 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LiveDebugVariables.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervalUnion.h"
 #include "llvm/CodeGen/LiveIntervals.h"

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -1421,10 +1421,9 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
   // since FastRegAlloc does the replacements itself.
   addPass(createVirtRegRewriter(false));
 
-  // As by this point SGPR's RA is done introducing SGPR spills to stack frame
-  // through SGPRAllocPass. So, invoking StackSlotColoring here, may allow these
-  // SGPR spills to re-use stack slots, before these spills is further lowered
-  // down via SILowerSGPRSpills(i.e. equivalent of PEI for SGPRs).
+  // At this point, the sgpr-regalloc has been done and it is good to have the
+  // stack slot coloring to try to optimize the SGPR spill stack indices before
+  // attempting the custom SGPR spill lowering.
   addPass(&StackSlotColoringID);
 
   // Equivalent of PEI for SGPRs.

llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp

@@ -278,14 +278,12 @@ void SILowerSGPRSpills::extendWWMVirtRegLiveness(MachineFunction &MF,
   for (auto Reg : MFI->getSGPRSpillVGPRs()) {
     for (MachineBasicBlock *SaveBlock : SaveBlocks) {
       MachineBasicBlock::iterator InsertBefore = SaveBlock->begin();
-
       DebugLoc DL = SaveBlock->findDebugLoc(InsertBefore);
       auto MIB = BuildMI(*SaveBlock, InsertBefore, DL,
                          TII->get(AMDGPU::IMPLICIT_DEF), Reg);
       MFI->setFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG);
       // Set SGPR_SPILL asm printer flag
       MIB->setAsmPrinterFlag(AMDGPU::SGPR_SPILL);
-
       if (LIS)
         LIS->InsertMachineInstrInMaps(*MIB);
     }
@@ -301,7 +299,6 @@ void SILowerSGPRSpills::extendWWMVirtRegLiveness(MachineFunction &MF,
       auto MIB = BuildMI(*RestoreBlock, InsertBefore, DL,
                          TII->get(TargetOpcode::KILL));
       MIB.addReg(Reg);
-
       if (LIS)
         LIS->InsertMachineInstrInMaps(*MIB);
     }