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[LV] Add real uses in some tests, to make them more robust.
Add real uses to some tests, to ensure dead instructions cannot be directly removed.
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+171
-112
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8 files changed

+171
-112
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‎llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,9 +22,10 @@ define void @induction_i7(i64* %dst) #0 {
2222
; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 0
2323
; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 2 x i7> [[VEC_IND]], zeroinitializer
2424
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i64, i64* [[DST:%.*]], i64 [[TMP10]]
25+
; CHECK-NEXT: [[EXT:%.+]] = zext <vscale x 2 x i7> [[TMP11]] to <vscale x 2 x i64>
2526
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i64, i64* [[TMP12]], i32 0
2627
; CHECK-NEXT: [[TMP14:%.*]] = bitcast i64* [[TMP13]] to <vscale x 2 x i64>*
27-
; CHECK-NEXT: store <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i64>* [[TMP14]], align 8
28+
; CHECK-NEXT: store <vscale x 2 x i64> [[EXT]], <vscale x 2 x i64>* [[TMP14]], align 8
2829
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()
2930
; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], 2
3031
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP16]]
@@ -38,7 +39,8 @@ for.body: ; preds = %for.body, %entry
3839
%indvars.iv1286 = phi i64 [ %indvars.iv.next1287, %for.body ], [ 0, %entry ]
3940
%addi7 = add i7 %indvars.iv1294, 0
4041
%arrayidx = getelementptr inbounds i64, i64* %dst, i64 %indvars.iv1286
41-
store i64 0, i64* %arrayidx, align 8
42+
%ext = zext i7 %addi7 to i64
43+
store i64 %ext, i64* %arrayidx, align 8
4244
%indvars.iv.next1287 = add nuw nsw i64 %indvars.iv1286, 1
4345
%indvars.iv.next1295 = add i7 %indvars.iv1294, 1
4446
%exitcond = icmp eq i64 %indvars.iv.next1287, 64

‎llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -145,7 +145,7 @@ define void @pointer_induction(i8* noalias %start, i64 %N) {
145145
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
146146
; CHECK: vector.body:
147147
; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi i8* [ [[START]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]
148-
; CHECK-NEXT: [[INDEX3:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
148+
; CHECK-NEXT: [[INDEX2:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
149149
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
150150
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 2
151151
; CHECK-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 1
@@ -157,19 +157,22 @@ define void @pointer_induction(i8* noalias %start, i64 %N) {
157157
; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 2 x i64> [[DOTSPLAT]], [[TMP10]]
158158
; CHECK-NEXT: [[VECTOR_GEP:%.*]] = mul <vscale x 2 x i64> [[TMP11]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
159159
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[POINTER_PHI]], <vscale x 2 x i64> [[VECTOR_GEP]]
160-
; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[INDEX3]], 0
160+
; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[INDEX2]], 0
161161
; CHECK-NEXT: [[TMP14:%.*]] = extractelement <vscale x 2 x i8*> [[TMP12]], i32 0
162162
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, i8* [[TMP14]], i32 0
163163
; CHECK-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to <vscale x 2 x i8>*
164164
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i8>, <vscale x 2 x i8>* [[TMP16]], align 1
165-
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, <vscale x 2 x i8*> [[TMP12]], i64 1
166-
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq <vscale x 2 x i8*> [[TMP17]], [[BROADCAST_SPLAT]]
167-
; CHECK-NEXT: [[TMP19:%.*]] = call i64 @llvm.vscale.i64()
168-
; CHECK-NEXT: [[TMP20:%.*]] = mul i64 [[TMP19]], 2
169-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX3]], [[TMP20]]
165+
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 2 x i8> [[WIDE_LOAD]], shufflevector (<vscale x 2 x i8> insertelement (<vscale x 2 x i8> poison, i8 1, i32 0), <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer)
166+
; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP15]] to <vscale x 2 x i8>*
167+
; CHECK-NEXT: store <vscale x 2 x i8> [[TMP17]], <vscale x 2 x i8>* [[TMP18]], align 1
168+
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i8, <vscale x 2 x i8*> [[TMP12]], i64 1
169+
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq <vscale x 2 x i8*> [[TMP19]], [[BROADCAST_SPLAT]]
170+
; CHECK-NEXT: [[TMP21:%.*]] = call i64 @llvm.vscale.i64()
171+
; CHECK-NEXT: [[TMP22:%.*]] = mul i64 [[TMP21]], 2
172+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX2]], [[TMP22]]
170173
; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, i8* [[POINTER_PHI]], i64 [[TMP8]]
171-
; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
172-
; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
174+
; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
175+
; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
173176
; CHECK: middle.block:
174177
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]
175178
; CHECK-NEXT: br i1 [[CMP_N]], label [[END:%.*]], label [[SCALAR_PH]]
@@ -181,7 +184,9 @@ define void @pointer_induction(i8* noalias %start, i64 %N) {
181184
; CHECK-NEXT: [[PTR_PHI:%.*]] = phi i8* [ [[PTR_PHI_NEXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
182185
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
183186
; CHECK-NEXT: [[INDEX_NXT]] = add i64 [[INDEX]], 1
184-
; CHECK-NEXT: [[TMP22:%.*]] = load i8, i8* [[PTR_PHI]], align 1
187+
; CHECK-NEXT: [[TMP24:%.*]] = load i8, i8* [[PTR_PHI]], align 1
188+
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[TMP24]], 1
189+
; CHECK-NEXT: store i8 [[ADD]], i8* [[PTR_PHI]], align 1
185190
; CHECK-NEXT: [[PTR_PHI_NEXT]] = getelementptr inbounds i8, i8* [[PTR_PHI]], i64 1
186191
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i8* [[PTR_PHI_NEXT]], [[START]]
187192
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDEX]], [[N]]
@@ -197,6 +202,8 @@ for.body:
197202
%index = phi i64 [ %index_nxt, %for.body ], [ 0, %entry ]
198203
%index_nxt = add i64 %index, 1
199204
%0 = load i8, i8* %ptr.phi, align 1
205+
%add = add i8 %0, 1
206+
store i8 %add, i8* %ptr.phi
200207
%ptr.phi.next = getelementptr inbounds i8, i8* %ptr.phi, i64 1
201208
%cmp.i.not = icmp eq i8* %ptr.phi.next, %start
202209
%cmp = icmp ult i64 %index, %N

‎llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,8 @@ define void @foo(i8* %start, i8* %end) {
2727
; CHECK-NEXT: [[TMP5:%.*]] = add nsw i32 -1, [[INDUCTION3]]
2828
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[END]], i32 [[TMP4]]
2929
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[END]], i32 [[TMP5]]
30+
; CHECK-NEXT: store i8 0, i8* [[TMP6]], align 1
31+
; CHECK-NEXT: store i8 0, i8* [[TMP7]], align 1
3032
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
3133
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
3234
; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
@@ -40,6 +42,7 @@ define void @foo(i8* %start, i8* %end) {
4042
; CHECK-NEXT: [[COUNT_09:%.*]] = phi i32 [ [[ADD:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
4143
; CHECK-NEXT: [[ADD]] = add nsw i32 -1, [[COUNT_09]]
4244
; CHECK-NEXT: [[G:%.*]] = getelementptr i8, i8* [[END]], i32 [[ADD]]
45+
; CHECK-NEXT: store i8 0, i8* [[G]], align 1
4346
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8* [[START]], [[G]]
4447
; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END_LOOPEXIT]], !llvm.loop [[LOOP2:![0-9]+]]
4548
; CHECK: while.end.loopexit:
@@ -52,6 +55,7 @@ while.body: ; preds = %while.body, %entry
5255
%count.09 = phi i32 [ %add, %while.body ], [ 0, %entry ]
5356
%add = add nsw i32 -1, %count.09
5457
%G = getelementptr i8, i8* %end, i32 %add
58+
store i8 0, i8* %G
5559
%cmp = icmp ult i8* %start, %G
5660
br i1 %cmp, label %while.body, label %while.end.loopexit
5761

‎llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll

Lines changed: 26 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -57,30 +57,36 @@ define void @cff_index_load_offsets(i1 %cond, i8 %x, i8* %p) #0 {
5757
; CHECK-NEXT: [[TMP18:%.*]] = or <4 x i32> [[TMP16]], [[TMP10]]
5858
; CHECK-NEXT: [[TMP19:%.*]] = or <4 x i32> [[TMP17]], [[TMP11]]
5959
; CHECK-NEXT: [[TMP20:%.*]] = load i8, i8* undef, align 1, !tbaa [[TBAA1]]
60+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <4 x i8> poison, i8 [[TMP20]], i32 0
61+
; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT8]], <4 x i8> poison, <4 x i32> zeroinitializer
6062
; CHECK-NEXT: [[TMP21:%.*]] = load i8, i8* undef, align 1, !tbaa [[TBAA1]]
63+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <4 x i8> poison, i8 [[TMP21]], i32 0
64+
; CHECK-NEXT: [[BROADCAST_SPLAT11:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT10]], <4 x i8> poison, <4 x i32> zeroinitializer
6165
; CHECK-NEXT: [[TMP22:%.*]] = or <4 x i32> [[TMP18]], zeroinitializer
6266
; CHECK-NEXT: [[TMP23:%.*]] = or <4 x i32> [[TMP19]], zeroinitializer
63-
; CHECK-NEXT: [[TMP24:%.*]] = or <4 x i32> [[TMP22]], zeroinitializer
64-
; CHECK-NEXT: [[TMP25:%.*]] = or <4 x i32> [[TMP23]], zeroinitializer
65-
; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP24]], i32 0
66-
; CHECK-NEXT: store i32 [[TMP26]], i32* undef, align 4, !tbaa [[TBAA4:![0-9]+]]
67-
; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP24]], i32 1
68-
; CHECK-NEXT: store i32 [[TMP27]], i32* undef, align 4, !tbaa [[TBAA4]]
69-
; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP24]], i32 2
70-
; CHECK-NEXT: store i32 [[TMP28]], i32* undef, align 4, !tbaa [[TBAA4]]
71-
; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[TMP24]], i32 3
67+
; CHECK-NEXT: [[TMP24:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT9]] to <4 x i32>
68+
; CHECK-NEXT: [[TMP25:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT11]] to <4 x i32>
69+
; CHECK-NEXT: [[TMP26:%.*]] = or <4 x i32> [[TMP22]], [[TMP24]]
70+
; CHECK-NEXT: [[TMP27:%.*]] = or <4 x i32> [[TMP23]], [[TMP25]]
71+
; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP26]], i32 0
72+
; CHECK-NEXT: store i32 [[TMP28]], i32* undef, align 4, !tbaa [[TBAA4:![0-9]+]]
73+
; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[TMP26]], i32 1
7274
; CHECK-NEXT: store i32 [[TMP29]], i32* undef, align 4, !tbaa [[TBAA4]]
73-
; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP25]], i32 0
75+
; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP26]], i32 2
7476
; CHECK-NEXT: store i32 [[TMP30]], i32* undef, align 4, !tbaa [[TBAA4]]
75-
; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i32> [[TMP25]], i32 1
77+
; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i32> [[TMP26]], i32 3
7678
; CHECK-NEXT: store i32 [[TMP31]], i32* undef, align 4, !tbaa [[TBAA4]]
77-
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x i32> [[TMP25]], i32 2
79+
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x i32> [[TMP27]], i32 0
7880
; CHECK-NEXT: store i32 [[TMP32]], i32* undef, align 4, !tbaa [[TBAA4]]
79-
; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i32> [[TMP25]], i32 3
81+
; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i32> [[TMP27]], i32 1
8082
; CHECK-NEXT: store i32 [[TMP33]], i32* undef, align 4, !tbaa [[TBAA4]]
83+
; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x i32> [[TMP27]], i32 2
84+
; CHECK-NEXT: store i32 [[TMP34]], i32* undef, align 4, !tbaa [[TBAA4]]
85+
; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x i32> [[TMP27]], i32 3
86+
; CHECK-NEXT: store i32 [[TMP35]], i32* undef, align 4, !tbaa [[TBAA4]]
8187
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
82-
; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
83-
; CHECK-NEXT: br i1 [[TMP34]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
88+
; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
89+
; CHECK-NEXT: br i1 [[TMP36]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
8490
; CHECK: middle.block:
8591
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
8692
; CHECK-NEXT: br i1 [[CMP_N]], label [[SW_EPILOG:%.*]], label [[SCALAR_PH]]
@@ -91,14 +97,14 @@ define void @cff_index_load_offsets(i1 %cond, i8 %x, i8* %p) #0 {
9197
; CHECK-NEXT: [[P_359:%.*]] = phi i8* [ [[ADD_PTR86:%.*]], [[FOR_BODY68]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
9298
; CHECK-NEXT: [[CONV70:%.*]] = zext i8 [[X]] to i32
9399
; CHECK-NEXT: [[SHL71:%.*]] = shl nuw i32 [[CONV70]], 24
94-
; CHECK-NEXT: [[TMP35:%.*]] = load i8, i8* [[P]], align 1, !tbaa [[TBAA1]]
95-
; CHECK-NEXT: [[CONV73:%.*]] = zext i8 [[TMP35]] to i32
100+
; CHECK-NEXT: [[TMP37:%.*]] = load i8, i8* [[P]], align 1, !tbaa [[TBAA1]]
101+
; CHECK-NEXT: [[CONV73:%.*]] = zext i8 [[TMP37]] to i32
96102
; CHECK-NEXT: [[SHL74:%.*]] = shl nuw nsw i32 [[CONV73]], 16
97103
; CHECK-NEXT: [[OR75:%.*]] = or i32 [[SHL74]], [[SHL71]]
98-
; CHECK-NEXT: [[TMP36:%.*]] = load i8, i8* undef, align 1, !tbaa [[TBAA1]]
104+
; CHECK-NEXT: [[TMP38:%.*]] = load i8, i8* undef, align 1, !tbaa [[TBAA1]]
99105
; CHECK-NEXT: [[SHL78:%.*]] = shl nuw nsw i32 undef, 8
100106
; CHECK-NEXT: [[OR79:%.*]] = or i32 [[OR75]], [[SHL78]]
101-
; CHECK-NEXT: [[CONV81:%.*]] = zext i8 undef to i32
107+
; CHECK-NEXT: [[CONV81:%.*]] = zext i8 [[TMP38]] to i32
102108
; CHECK-NEXT: [[OR83:%.*]] = or i32 [[OR79]], [[CONV81]]
103109
; CHECK-NEXT: store i32 [[OR83]], i32* undef, align 4, !tbaa [[TBAA4]]
104110
; CHECK-NEXT: [[ADD_PTR86]] = getelementptr inbounds i8, i8* [[P_359]], i64 4
@@ -126,7 +132,7 @@ for.body68: ; preds = %for.body68, %if.the
126132
%1 = load i8, i8* undef, align 1, !tbaa !1
127133
%shl78 = shl nuw nsw i32 undef, 8
128134
%or79 = or i32 %or75, %shl78
129-
%conv81 = zext i8 undef to i32
135+
%conv81 = zext i8 %1 to i32
130136
%or83 = or i32 %or79, %conv81
131137
store i32 %or83, i32* undef, align 4, !tbaa !4
132138
%add.ptr86 = getelementptr inbounds i8, i8* %p.359, i64 4

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