Skip to content

Commit 460c670

Browse files
committed
register bank select for scalable vector load/store
1 parent c535d4f commit 460c670

File tree

3 files changed

+3166
-6
lines changed

3 files changed

+3166
-6
lines changed

llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp

Lines changed: 27 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -355,10 +355,20 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
355355
switch (Opc) {
356356
case TargetOpcode::G_LOAD: {
357357
LLT Ty = MRI.getType(MI.getOperand(0).getReg());
358-
OpdsMapping[0] = GPRValueMapping;
359-
OpdsMapping[1] = GPRValueMapping;
358+
TypeSize Size = Ty.getSizeInBits();
359+
if (Ty.isVector()) {
360+
OpdsMapping[0] = getVRBValueMapping(Size.getKnownMinValue());
361+
OpdsMapping[1] = getVRBValueMapping(Size.getKnownMinValue());
362+
} else if (isPreISelGenericFloatingPointOpcode(Opc)) {
363+
OpdsMapping[0] = getFPValueMapping(Size.getFixedValue());
364+
OpdsMapping[1] = getFPValueMapping(Size.getFixedValue());
365+
} else {
366+
OpdsMapping[0] = GPRValueMapping;
367+
OpdsMapping[1] = GPRValueMapping;
368+
}
360369
// Use FPR64 for s64 loads on rv32.
361-
if (GPRSize == 32 && Ty.getSizeInBits() == 64) {
370+
if (GPRSize == 32 && Ty.getSizeInBits().getKnownMinValue() == 64 &&
371+
!Ty.isVector()) {
362372
assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD());
363373
OpdsMapping[0] = getFPValueMapping(Ty.getSizeInBits());
364374
break;
@@ -378,10 +388,21 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
378388
}
379389
case TargetOpcode::G_STORE: {
380390
LLT Ty = MRI.getType(MI.getOperand(0).getReg());
381-
OpdsMapping[0] = GPRValueMapping;
382-
OpdsMapping[1] = GPRValueMapping;
391+
TypeSize Size = Ty.getSizeInBits();
392+
if (Ty.isVector()) {
393+
OpdsMapping[0] = getVRBValueMapping(Size.getKnownMinValue());
394+
OpdsMapping[1] = getVRBValueMapping(Size.getKnownMinValue());
395+
} else if (isPreISelGenericFloatingPointOpcode(Opc)) {
396+
OpdsMapping[0] = getFPValueMapping(Size.getFixedValue());
397+
OpdsMapping[1] = getFPValueMapping(Size.getFixedValue());
398+
} else {
399+
OpdsMapping[0] = GPRValueMapping;
400+
OpdsMapping[1] = GPRValueMapping;
401+
}
402+
383403
// Use FPR64 for s64 stores on rv32.
384-
if (GPRSize == 32 && Ty.getSizeInBits() == 64) {
404+
if (GPRSize == 32 && Ty.getSizeInBits().getKnownMinValue() == 64 &&
405+
!Ty.isVector()) {
385406
assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD());
386407
OpdsMapping[0] = getFPValueMapping(Ty.getSizeInBits());
387408
break;

0 commit comments

Comments
 (0)