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[RISCV][llvm-mca] Add vector crypto llvm-mca tests for P600
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8 files changed

+1307
-23
lines changed

8 files changed

+1307
-23
lines changed

llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td

Lines changed: 35 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -60,26 +60,23 @@ multiclass VROR_IV_V_X_I<string opcodestr, bits<6> funct6>
6060

6161
// op vd, vs2, vs1
6262
class PALUVVNoVm<bits<6> funct6, RISCVVFormat opv, string opcodestr>
63-
: VALUVVNoVm<funct6, opv, opcodestr>,
64-
SchedUnaryMC<"WriteVIALUI", "ReadVIALUV"> {
63+
: VALUVVNoVm<funct6, opv, opcodestr> {
6564
let Inst{6-0} = OPC_OP_VE.Value;
6665
}
6766

6867
// op vd, vs2, vs1
6968
class PALUVVNoVmTernary<bits<6> funct6, RISCVVFormat opv, string opcodestr>
7069
: RVInstVV<funct6, opv, (outs VR:$vd_wb),
7170
(ins VR:$vd, VR:$vs2, VR:$vs1),
72-
opcodestr, "$vd, $vs2, $vs1">,
73-
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV"> {
71+
opcodestr, "$vd, $vs2, $vs1"> {
7472
let Constraints = "$vd = $vd_wb";
7573
let vm = 1;
7674
let Inst{6-0} = OPC_OP_VE.Value;
7775
}
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7977
// op vd, vs2, imm
8078
class PALUVINoVm<bits<6> funct6, string opcodestr, Operand optype>
81-
: VALUVINoVm<funct6, opcodestr, optype>,
82-
SchedUnaryMC<"WriteVIALUV", "ReadVIALUV"> {
79+
: VALUVINoVm<funct6, opcodestr, optype> {
8380
let Inst{6-0} = OPC_OP_VE.Value;
8481
let Inst{14-12} = OPMVV.Value;
8582
}
@@ -88,8 +85,7 @@ class PALUVINoVm<bits<6> funct6, string opcodestr, Operand optype>
8885
class PALUVINoVmBinary<bits<6> funct6, string opcodestr, Operand optype>
8986
: RVInstIVI<funct6, (outs VR:$vd_wb),
9087
(ins VR:$vd, VR:$vs2, optype:$imm),
91-
opcodestr, "$vd, $vs2, $imm">,
92-
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV"> {
88+
opcodestr, "$vd, $vs2, $imm"> {
9389
let Constraints = "$vd = $vd_wb";
9490
let vm = 1;
9591
let Inst{6-0} = OPC_OP_VE.Value;
@@ -101,8 +97,7 @@ class PALUVINoVmBinary<bits<6> funct6, string opcodestr, Operand optype>
10197
class PALUVs2NoVmBinary<bits<6> funct6, bits<5> vs1, RISCVVFormat opv,
10298
string opcodestr>
10399
: RVInstV<funct6, vs1, opv, (outs VR:$vd_wb), (ins VR:$vd, VR:$vs2),
104-
opcodestr, "$vd, $vs2">,
105-
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV"> {
100+
opcodestr, "$vd, $vs2"> {
106101
let Constraints = "$vd = $vd_wb";
107102
let vm = 1;
108103
let Inst{6-0} = OPC_OP_VE.Value;
@@ -111,9 +106,11 @@ class PALUVs2NoVmBinary<bits<6> funct6, bits<5> vs1, RISCVVFormat opv,
111106
multiclass VAES_MV_V_S<bits<6> funct6_vv, bits<6> funct6_vs, bits<5> vs1,
112107
RISCVVFormat opv, string opcodestr> {
113108
let RVVConstraint = NoConstraint in
114-
def NAME # _VV : PALUVs2NoVmBinary<funct6_vv, vs1, opv, opcodestr # ".vv">;
109+
def NAME # _VV : PALUVs2NoVmBinary<funct6_vv, vs1, opv, opcodestr # ".vv">,
110+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
115111
let RVVConstraint = VS2Constraint in
116-
def NAME # _VS : PALUVs2NoVmBinary<funct6_vs, vs1, opv, opcodestr # ".vs">;
112+
def NAME # _VS : PALUVs2NoVmBinary<funct6_vs, vs1, opv, opcodestr # ".vs">,
113+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
117114
}
118115
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
119116

@@ -144,36 +141,51 @@ let Predicates = [HasStdExtZvkb] in {
144141
} // Predicates = [HasStdExtZvkb]
145142

146143
let Predicates = [HasStdExtZvkg], RVVConstraint = NoConstraint in {
147-
def VGHSH_VV : PALUVVNoVmTernary<0b101100, OPMVV, "vghsh.vv">;
148-
def VGMUL_VV : PALUVs2NoVmBinary<0b101000, 0b10001, OPMVV, "vgmul.vv">;
144+
def VGHSH_VV : PALUVVNoVmTernary<0b101100, OPMVV, "vghsh.vv">,
145+
SchedTernaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV",
146+
"ReadVIALUV">;
147+
def VGMUL_VV : PALUVs2NoVmBinary<0b101000, 0b10001, OPMVV, "vgmul.vv">,
148+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
149149
} // Predicates = [HasStdExtZvkg]
150150

151151
let Predicates = [HasStdExtZvknhaOrZvknhb], RVVConstraint = Sha2Constraint in {
152-
def VSHA2CH_VV : PALUVVNoVmTernary<0b101110, OPMVV, "vsha2ch.vv">;
153-
def VSHA2CL_VV : PALUVVNoVmTernary<0b101111, OPMVV, "vsha2cl.vv">;
154-
def VSHA2MS_VV : PALUVVNoVmTernary<0b101101, OPMVV, "vsha2ms.vv">;
152+
def VSHA2CH_VV : PALUVVNoVmTernary<0b101110, OPMVV, "vsha2ch.vv">,
153+
SchedTernaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV",
154+
"ReadVIALUV">;
155+
def VSHA2CL_VV : PALUVVNoVmTernary<0b101111, OPMVV, "vsha2cl.vv">,
156+
SchedTernaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV",
157+
"ReadVIALUV">;
158+
def VSHA2MS_VV : PALUVVNoVmTernary<0b101101, OPMVV, "vsha2ms.vv">,
159+
SchedTernaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV",
160+
"ReadVIALUV">;
155161
} // Predicates = [HasStdExtZvknhaOrZvknhb]
156162

157163
let Predicates = [HasStdExtZvkned] in {
158164
defm VAESDF : VAES_MV_V_S<0b101000, 0b101001, 0b00001, OPMVV, "vaesdf">;
159165
defm VAESDM : VAES_MV_V_S<0b101000, 0b101001, 0b00000, OPMVV, "vaesdm">;
160166
defm VAESEF : VAES_MV_V_S<0b101000, 0b101001, 0b00011, OPMVV, "vaesef">;
161167
defm VAESEM : VAES_MV_V_S<0b101000, 0b101001, 0b00010, OPMVV, "vaesem">;
162-
def VAESKF1_VI : PALUVINoVm<0b100010, "vaeskf1.vi", uimm5>;
163-
def VAESKF2_VI : PALUVINoVmBinary<0b101010, "vaeskf2.vi", uimm5>;
168+
def VAESKF1_VI : PALUVINoVm<0b100010, "vaeskf1.vi", uimm5>,
169+
SchedUnaryMC<"WriteVIALUV", "ReadVIALUV">;
170+
def VAESKF2_VI : PALUVINoVmBinary<0b101010, "vaeskf2.vi", uimm5>,
171+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
164172
let RVVConstraint = VS2Constraint in
165-
def VAESZ_VS : PALUVs2NoVmBinary<0b101001, 0b00111, OPMVV, "vaesz.vs">;
173+
def VAESZ_VS : PALUVs2NoVmBinary<0b101001, 0b00111, OPMVV, "vaesz.vs">,
174+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
166175
} // Predicates = [HasStdExtZvkned]
167176

168177
let Predicates = [HasStdExtZvksed] in {
169178
let RVVConstraint = NoConstraint in
170-
def VSM4K_VI : PALUVINoVm<0b100001, "vsm4k.vi", uimm5>;
179+
def VSM4K_VI : PALUVINoVm<0b100001, "vsm4k.vi", uimm5>,
180+
SchedUnaryMC<"WriteVIALUV", "ReadVIALUV">;
171181
defm VSM4R : VAES_MV_V_S<0b101000, 0b101001, 0b10000, OPMVV, "vsm4r">;
172182
} // Predicates = [HasStdExtZvksed]
173183

174184
let Predicates = [HasStdExtZvksh], RVVConstraint = VS2Constraint in {
175-
def VSM3C_VI : PALUVINoVmBinary<0b101011, "vsm3c.vi", uimm5>;
176-
def VSM3ME_VV : PALUVVNoVm<0b100000, OPMVV, "vsm3me.vv">;
185+
def VSM3C_VI : PALUVINoVmBinary<0b101011, "vsm3c.vi", uimm5>,
186+
SchedBinaryMC<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV">;
187+
def VSM3ME_VV : PALUVVNoVm<0b100000, OPMVV, "vsm3me.vv">,
188+
SchedUnaryMC<"WriteVIALUI", "ReadVIALUV">;
177189
} // Predicates = [HasStdExtZvksh]
178190

179191
//===----------------------------------------------------------------------===//

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