Add tests for multiple SVE legal arguments

Author: Him188

llvm/test/CodeGen/AArch64/GlobalISel/sve-formal-argument-multiple.ll

@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -global-isel -global-isel-abort=1 -aarch64-enable-gisel-sve=1 %s -o - | FileCheck %s
+
+;; Test the correct usage of the Z registers with multiple SVE arguments.
+
+define void @formal_argument_nxv16i8_2(<vscale x 16 x i8> %0, <vscale x 16 x i8> %1, ptr %p) {
+; CHECK-LABEL: formal_argument_nxv16i8_2:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ptrue p0.b
+; CHECK-NEXT:    st1b { z0.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z1.b }, p0, [x0]
+; CHECK-NEXT:    ret
+  store <vscale x 16 x i8> %0, ptr %p, align 16
+  store <vscale x 16 x i8> %1, ptr %p, align 16
+  ret void
+}
+
+define void @formal_argument_nxv16i8_8(
+; CHECK-LABEL: formal_argument_nxv16i8_8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ptrue p0.b
+; CHECK-NEXT:    st1b { z0.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z1.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z2.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z3.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z4.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z5.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z6.b }, p0, [x0]
+; CHECK-NEXT:    st1b { z7.b }, p0, [x0]
+; CHECK-NEXT:    ret
+    <vscale x 16 x i8> %0, <vscale x 16 x i8> %1, <vscale x 16 x i8> %2, <vscale x 16 x i8> %3,
+    <vscale x 16 x i8> %4, <vscale x 16 x i8> %5, <vscale x 16 x i8> %6, <vscale x 16 x i8> %7,
+    ptr %p) {
+
+  store <vscale x 16 x i8> %0, ptr %p, align 16
+  store <vscale x 16 x i8> %1, ptr %p, align 16
+  store <vscale x 16 x i8> %2, ptr %p, align 16
+  store <vscale x 16 x i8> %3, ptr %p, align 16
+  store <vscale x 16 x i8> %4, ptr %p, align 16
+  store <vscale x 16 x i8> %5, ptr %p, align 16
+  store <vscale x 16 x i8> %6, ptr %p, align 16
+  store <vscale x 16 x i8> %7, ptr %p, align 16
+  ret void
+}