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[GISel][RISCV] Legalize G_FREM (#93063)
This patch adds support for `G_FREM` on RISCV.
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‎llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -375,6 +375,11 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
375375
G_FABS, G_FSQRT, G_FMAXNUM, G_FMINNUM})
376376
.legalIf(typeIsScalarFPArith(0, ST));
377377

378+
getActionDefinitionsBuilder(G_FREM)
379+
.libcallFor({s32, s64})
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.minScalar(0, s32)
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.scalarize(0);
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378383
getActionDefinitionsBuilder(G_FCOPYSIGN)
379384
.legalIf(all(typeIsScalarFPArith(0, ST), typeIsScalarFPArith(1, ST)));
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‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-frem-rv32.mir

Lines changed: 130 additions & 0 deletions
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=riscv32 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
3+
---
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name: frem_f32
5+
body: |
6+
bb.1.entry:
7+
liveins: $x10, $x11
8+
9+
; CHECK-LABEL: name: frem_f32
10+
; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
16+
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:_(s32) = COPY $x10
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%1:_(s32) = COPY $x11
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%2:_(s32) = G_FREM %0, %1
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$x10 = COPY %2(s32)
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PseudoRET implicit $x10
27+
28+
...
29+
---
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name: frem_f64
31+
body: |
32+
bb.1.entry:
33+
liveins: $x10, $x11, $x12, $x13
34+
35+
; CHECK-LABEL: name: frem_f64
36+
; CHECK: liveins: $x10, $x11, $x12, $x13
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
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; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-NEXT: $x12 = COPY [[COPY2]](s32)
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; CHECK-NEXT: $x13 = COPY [[COPY3]](s32)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmod, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
48+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: $x10 = COPY [[COPY4]](s32)
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; CHECK-NEXT: $x11 = COPY [[COPY5]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
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%2:_(s32) = COPY $x10
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%3:_(s32) = COPY $x11
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%0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
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%4:_(s32) = COPY $x12
58+
%5:_(s32) = COPY $x13
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%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
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%6:_(s64) = G_FREM %0, %1
61+
%7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
62+
$x10 = COPY %7(s32)
63+
$x11 = COPY %8(s32)
64+
PseudoRET implicit $x10, implicit $x11
65+
66+
...
67+
---
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name: frem_f16
69+
body: |
70+
bb.0.entry:
71+
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; CHECK-LABEL: name: frem_f16
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
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; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
80+
; CHECK-NEXT: $x10 = COPY [[FPEXT]](s32)
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; CHECK-NEXT: $x11 = COPY [[FPEXT1]](s32)
82+
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY2]](s32)
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; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
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; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:_(s32) = COPY $x10
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%1:_(s32) = COPY $x11
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%2:_(s16) = G_TRUNC %0(s32)
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%3:_(s16) = G_TRUNC %1(s32)
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%4:_(s16) = G_FREM %2, %3
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%5:_(s32) = G_ANYEXT %4(s16)
95+
$x10 = COPY %5(s32)
96+
PseudoRET implicit $x10
97+
98+
...
99+
---
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name: frem_v2f32
101+
body: |
102+
bb.0.entry:
103+
104+
; CHECK-LABEL: name: frem_v2f32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $v8
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $v9
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: $x10 = COPY [[UV]](s32)
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; CHECK-NEXT: $x11 = COPY [[UV2]](s32)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
116+
; CHECK-NEXT: $x10 = COPY [[UV1]](s32)
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; CHECK-NEXT: $x11 = COPY [[UV3]](s32)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
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; CHECK-NEXT: $v8 = COPY [[BUILD_VECTOR]](<2 x s32>)
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; CHECK-NEXT: PseudoRET implicit $v8
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%0:_(<2 x s32>) = COPY $v8
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%1:_(<2 x s32>) = COPY $v9
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%2:_(<2 x s32>) = G_FREM %0, %1
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$v8 = COPY %2(<2 x s32>)
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PseudoRET implicit $v8
129+
130+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-frem-rv64.mir

Lines changed: 130 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=riscv64 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
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---
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name: frem_f32
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body: |
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bb.1.entry:
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liveins: $x10, $x11
8+
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; CHECK-LABEL: name: frem_f32
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
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; CHECK-NEXT: PseudoRET implicit $x10
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%2:_(s64) = COPY $x10
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%0:_(s32) = G_TRUNC %2(s64)
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%3:_(s64) = COPY $x11
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%1:_(s32) = G_TRUNC %3(s64)
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%4:_(s32) = G_FREM %0, %1
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%5:_(s64) = G_ANYEXT %4(s32)
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$x10 = COPY %5(s64)
29+
PseudoRET implicit $x10
30+
31+
...
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---
33+
name: frem_f64
34+
body: |
35+
bb.1.entry:
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liveins: $x10, $x11
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38+
; CHECK-LABEL: name: frem_f64
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmod, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:_(s64) = COPY $x10
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%1:_(s64) = COPY $x11
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%2:_(s64) = G_FREM %0, %1
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$x10 = COPY %2(s64)
55+
PseudoRET implicit $x10
56+
57+
...
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---
59+
name: frem_f16
60+
body: |
61+
bb.0.entry:
62+
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; CHECK-LABEL: name: frem_f16
64+
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)
67+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)
68+
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
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; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
71+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FPEXT]](s32)
72+
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[FPEXT1]](s32)
73+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; CHECK-NEXT: $x11 = COPY [[ANYEXT1]](s64)
75+
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
78+
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
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; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[TRUNC2]](s32)
80+
; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[FPTRUNC]](s16)
81+
; CHECK-NEXT: $x10 = COPY [[ANYEXT2]](s64)
82+
; CHECK-NEXT: PseudoRET implicit $x10
83+
%0:_(s64) = COPY $x10
84+
%1:_(s64) = COPY $x11
85+
%2:_(s16) = G_TRUNC %0(s64)
86+
%3:_(s16) = G_TRUNC %1(s64)
87+
%4:_(s16) = G_FREM %2, %3
88+
%5:_(s64) = G_ANYEXT %4(s16)
89+
$x10 = COPY %5(s64)
90+
PseudoRET implicit $x10
91+
92+
...
93+
---
94+
name: frem_v2f32
95+
body: |
96+
bb.0.entry:
97+
98+
; CHECK-LABEL: name: frem_v2f32
99+
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $v8
100+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $v9
101+
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
102+
; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
103+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
104+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32)
105+
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32)
106+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
107+
; CHECK-NEXT: $x11 = COPY [[ANYEXT1]](s64)
108+
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
109+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
110+
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
111+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
112+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
113+
; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32)
114+
; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[UV3]](s32)
115+
; CHECK-NEXT: $x10 = COPY [[ANYEXT2]](s64)
116+
; CHECK-NEXT: $x11 = COPY [[ANYEXT3]](s64)
117+
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
118+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
119+
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x10
120+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)
121+
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[TRUNC]](s32), [[TRUNC1]](s32)
122+
; CHECK-NEXT: $v8 = COPY [[BUILD_VECTOR]](<2 x s32>)
123+
; CHECK-NEXT: PseudoRET implicit $v8
124+
%0:_(<2 x s32>) = COPY $v8
125+
%1:_(<2 x s32>) = COPY $v9
126+
%2:_(<2 x s32>) = G_FREM %0, %1
127+
$v8 = COPY %2(<2 x s32>)
128+
PseudoRET implicit $v8
129+
130+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/libcalls.ll

Lines changed: 51 additions & 0 deletions
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=riscv32 -global-isel -verify-machineinstrs < %s \
3+
; RUN: | FileCheck %s --check-prefix=RV32
4+
; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \
5+
; RUN: | FileCheck %s --check-prefix=RV64
6+
7+
define float @test_f32(float %x, float %y) nounwind {
8+
; RV32-LABEL: test_f32:
9+
; RV32: # %bb.0: # %entry
10+
; RV32-NEXT: addi sp, sp, -16
11+
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
12+
; RV32-NEXT: call fmodf
13+
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
14+
; RV32-NEXT: addi sp, sp, 16
15+
; RV32-NEXT: ret
16+
;
17+
; RV64-LABEL: test_f32:
18+
; RV64: # %bb.0: # %entry
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; RV64-NEXT: addi sp, sp, -16
20+
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
21+
; RV64-NEXT: call fmodf
22+
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
23+
; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: ret
25+
entry:
26+
%z = frem float %x, %y
27+
ret float %z
28+
}
29+
30+
define double @test_f64(double %x, double %y) nounwind {
31+
; RV32-LABEL: test_f64:
32+
; RV32: # %bb.0: # %entry
33+
; RV32-NEXT: addi sp, sp, -16
34+
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
35+
; RV32-NEXT: call fmod
36+
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: ret
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;
40+
; RV64-LABEL: test_f64:
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; RV64: # %bb.0: # %entry
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; RV64-NEXT: addi sp, sp, -16
43+
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
44+
; RV64-NEXT: call fmod
45+
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
46+
; RV64-NEXT: addi sp, sp, 16
47+
; RV64-NEXT: ret
48+
entry:
49+
%z = frem double %x, %y
50+
ret double %z
51+
}

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