@@ -658,26 +658,23 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
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if (MI.getNumDefs () != 1 )
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return false ;
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+ // If we're not using VLMAX, then we need to be careful whether we are using
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+ // TA/TU when there is a non-undef Passthru. But when we are using VLMAX, it
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+ // does not matter whether we are using TA/TU with a non-undef Passthru, since
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+ // there are no tail elements to be perserved.
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unsigned VLOpNum = RISCVII::getVLOpNum (Desc);
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const MachineOperand &VLOp = MI.getOperand (VLOpNum);
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- if (((VLOp.isImm () && VLOp.getImm () != RISCV::VLMaxSentinel) ||
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- VLOp.isReg ())) {
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- bool UseTAPolicy = false ;
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+ if (VLOp.isReg () || VLOp.getImm () != RISCV::VLMaxSentinel) {
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+ // If MI has a non-undef passthru, we will not try to optimize it since
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+ // that requires us to preserve tail elements according to TA/TU.
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+ // Otherwise, The MI has an undef Passthru, so it doesn't matter whether we
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+ // are using TA/TU.
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bool HasPassthru = RISCVII::isFirstDefTiedToFirstUse (Desc);
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- if (RISCVII::hasVecPolicyOp (Desc.TSFlags )) {
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- unsigned PolicyOpNum = RISCVII::getVecPolicyOpNum (Desc);
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- const MachineOperand &PolicyOp = MI.getOperand (PolicyOpNum);
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- uint64_t Policy = PolicyOp.getImm ();
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- UseTAPolicy = Policy & RISCVII::TAIL_AGNOSTIC;
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- if (HasPassthru) {
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- unsigned PassthruOpIdx = MI.getNumExplicitDefs ();
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- UseTAPolicy = UseTAPolicy || (MI.getOperand (PassthruOpIdx).getReg () ==
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- RISCV::NoRegister);
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- }
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- }
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- if (!UseTAPolicy) {
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+ unsigned PassthruOpIdx = MI.getNumExplicitDefs ();
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+ if (HasPassthru &&
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+ MI.getOperand (PassthruOpIdx).getReg () != RISCV::NoRegister) {
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LLVM_DEBUG (
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- dbgs () << " Not a candidate because it uses tail-undisturbed policy "
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+ dbgs () << " Not a candidate because it uses non-undef passthru "
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" with non-VLMAX VL\n " );
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return false ;
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}
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