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1 parent 7a21ee3 commit 5d058eeCopy full SHA for 5d058ee
llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -240,8 +240,9 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
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case TargetOpcode::G_SEXT_INREG:
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return selectSExtInreg(MI, MIB);
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case TargetOpcode::G_FRAME_INDEX: {
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- // FIXME: We want to replace this with tablegen code that matches for
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- // FrameAddrRegImm
+ // TODO: We may want to replace this code with the SelectionDAG patterns,
+ // which fail to get imported because it uses FrameAddrRegImm, which is a
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+ // ComplexPattern
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Register DstReg = MI.getOperand(0).getReg();
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if (!MRI.getType(DstReg).isPointer())
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