|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -S -sroa < %s | FileCheck %s |
| 3 | + |
| 4 | +%st.half = type { half } |
| 5 | + |
| 6 | +; Allow speculateSelectInstLoads to fold load and select |
| 7 | +; even if there is an intervening bitcast. |
| 8 | +define <2 x i16> @test_load_bitcast_select(i1 %cond1, i1 %cond2) { |
| 9 | +; CHECK-LABEL: @test_load_bitcast_select( |
| 10 | +; CHECK-NEXT: entry: |
| 11 | +; CHECK-NEXT: [[TMP0:%.*]] = bitcast half 0xHFFFF to i16 |
| 12 | +; CHECK-NEXT: [[TMP1:%.*]] = bitcast half 0xH0000 to i16 |
| 13 | +; CHECK-NEXT: [[LD1_SROA_SPECULATED:%.*]] = select i1 [[COND1:%.*]], i16 [[TMP0]], i16 [[TMP1]] |
| 14 | +; CHECK-NEXT: [[V1:%.*]] = insertelement <2 x i16> undef, i16 [[LD1_SROA_SPECULATED]], i32 0 |
| 15 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast half 0xHFFFF to i16 |
| 16 | +; CHECK-NEXT: [[TMP3:%.*]] = bitcast half 0xH0000 to i16 |
| 17 | +; CHECK-NEXT: [[LD2_SROA_SPECULATED:%.*]] = select i1 [[COND2:%.*]], i16 [[TMP2]], i16 [[TMP3]] |
| 18 | +; CHECK-NEXT: [[V2:%.*]] = insertelement <2 x i16> [[V1]], i16 [[LD2_SROA_SPECULATED]], i32 1 |
| 19 | +; CHECK-NEXT: ret <2 x i16> [[V2]] |
| 20 | +; |
| 21 | +entry: |
| 22 | + %true = alloca half, align 2 |
| 23 | + %false = alloca half, align 2 |
| 24 | + store half 0xHFFFF, half* %true, align 2 |
| 25 | + store half 0xH0000, half* %false, align 2 |
| 26 | + %false.cast = bitcast half* %false to %st.half* |
| 27 | + %true.cast = bitcast half* %true to %st.half* |
| 28 | + %sel1 = select i1 %cond1, %st.half* %true.cast, %st.half* %false.cast |
| 29 | + %cast1 = bitcast %st.half* %sel1 to i16* |
| 30 | + %ld1 = load i16, i16* %cast1, align 2 |
| 31 | + %v1 = insertelement <2 x i16> undef, i16 %ld1, i32 0 |
| 32 | + %sel2 = select i1 %cond2, %st.half* %true.cast, %st.half* %false.cast |
| 33 | + %cast2 = bitcast %st.half* %sel2 to i16* |
| 34 | + %ld2 = load i16, i16* %cast2, align 2 |
| 35 | + %v2 = insertelement <2 x i16> %v1, i16 %ld2, i32 1 |
| 36 | + ret <2 x i16> %v2 |
| 37 | +} |
| 38 | + |
| 39 | +%st.args = type { i32, i32* } |
| 40 | + |
| 41 | +; A bitcasted load and a direct load of select. |
| 42 | +define void @test_multiple_loads_select(i1 %cmp){ |
| 43 | +; CHECK-LABEL: @test_multiple_loads_select( |
| 44 | +; CHECK-NEXT: entry: |
| 45 | +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* undef to i8* |
| 46 | +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* undef to i8* |
| 47 | +; CHECK-NEXT: [[ADDR_I8_SROA_SPECULATED:%.*]] = select i1 [[CMP:%.*]], i8* [[TMP0]], i8* [[TMP1]] |
| 48 | +; CHECK-NEXT: call void @foo_i8(i8* [[ADDR_I8_SROA_SPECULATED]]) |
| 49 | +; CHECK-NEXT: [[ADDR_I32_SROA_SPECULATED:%.*]] = select i1 [[CMP]], i32* undef, i32* undef |
| 50 | +; CHECK-NEXT: call void @foo_i32(i32* [[ADDR_I32_SROA_SPECULATED]]) |
| 51 | +; CHECK-NEXT: ret void |
| 52 | +; |
| 53 | +entry: |
| 54 | + %args = alloca [2 x %st.args], align 16 |
| 55 | + %arr0 = getelementptr inbounds [2 x %st.args], [2 x %st.args]* %args, i64 0, i64 0 |
| 56 | + %arr1 = getelementptr inbounds [2 x %st.args], [2 x %st.args]* %args, i64 0, i64 1 |
| 57 | + %sel = select i1 %cmp, %st.args* %arr1, %st.args* %arr0 |
| 58 | + %addr = getelementptr inbounds %st.args, %st.args* %sel, i64 0, i32 1 |
| 59 | + %bcast.i8 = bitcast i32** %addr to i8** |
| 60 | + %addr.i8 = load i8*, i8** %bcast.i8, align 8 |
| 61 | + call void @foo_i8(i8* %addr.i8) |
| 62 | + %addr.i32 = load i32*, i32** %addr, align 8 |
| 63 | + call void @foo_i32 (i32* %addr.i32) |
| 64 | + ret void |
| 65 | +} |
| 66 | + |
| 67 | +declare void @foo_i8(i8*) |
| 68 | +declare void @foo_i32(i32*) |
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