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AaronBallmanAaronBallman
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Reapply "Finish deleting the le32/le64 targets" (#99079) (#101983)
This reverts commit d3f8105. Halide no longer relies on this target: #98497 (comment)
1 parent 6e60d54 commit 617cf8a

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18 files changed

+4
-157
lines changed

18 files changed

+4
-157
lines changed

‎clang/docs/ReleaseNotes.rst

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@@ -37,6 +37,8 @@ These changes are ones which we think may surprise users when upgrading to
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Clang |release| because of the opportunity they pose for disruption to existing
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code bases.
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40+
- The ``le32`` and ``le64`` targets have been removed.
41+
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C/C++ Language Potentially Breaking Changes
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-------------------------------------------
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‎clang/docs/tools/clang-formatted-files.txt

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@@ -362,7 +362,6 @@ clang/lib/Basic/Targets/BPF.cpp
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clang/lib/Basic/Targets/BPF.h
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clang/lib/Basic/Targets/Hexagon.h
364364
clang/lib/Basic/Targets/Lanai.h
365-
clang/lib/Basic/Targets/Le64.h
366365
clang/lib/Basic/Targets/M68k.h
367366
clang/lib/Basic/Targets/MSP430.h
368367
clang/lib/Basic/Targets/NVPTX.cpp

‎clang/lib/Basic/CMakeLists.txt

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@@ -102,7 +102,6 @@ add_clang_library(clangBasic
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Targets/DirectX.cpp
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Targets/Hexagon.cpp
104104
Targets/Lanai.cpp
105-
Targets/Le64.cpp
106105
Targets/LoongArch.cpp
107106
Targets/M68k.cpp
108107
Targets/MSP430.cpp

‎clang/lib/Basic/Targets.cpp

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@@ -23,7 +23,6 @@
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#include "Targets/DirectX.h"
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#include "Targets/Hexagon.h"
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#include "Targets/Lanai.h"
26-
#include "Targets/Le64.h"
2726
#include "Targets/LoongArch.h"
2827
#include "Targets/M68k.h"
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#include "Targets/MSP430.h"
@@ -344,17 +343,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
344343
return std::make_unique<M68kTargetInfo>(Triple, Opts);
345344
}
346345

347-
case llvm::Triple::le32:
348-
switch (os) {
349-
case llvm::Triple::NaCl:
350-
return std::make_unique<NaClTargetInfo<PNaClTargetInfo>>(Triple, Opts);
351-
default:
352-
return nullptr;
353-
}
354-
355-
case llvm::Triple::le64:
356-
return std::make_unique<Le64TargetInfo>(Triple, Opts);
357-
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case llvm::Triple::ppc:
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switch (os) {
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case llvm::Triple::Linux:

‎clang/lib/Basic/Targets/Le64.cpp

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This file was deleted.

‎clang/lib/Basic/Targets/Le64.h

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This file was deleted.

‎clang/lib/Basic/Targets/OSTargets.h

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@@ -841,9 +841,6 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
841841
"i64:64-i128:128-n8:16:32:64-S128");
842842
} else if (Triple.getArch() == llvm::Triple::mipsel) {
843843
// Handled on mips' setDataLayout.
844-
} else {
845-
assert(Triple.getArch() == llvm::Triple::le32);
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this->resetDataLayout("e-p:32:32-i64:64");
847844
}
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}
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};

‎clang/lib/CodeGen/CodeGenModule.cpp

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@@ -116,8 +116,6 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
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default:
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return createDefaultTargetCodeGenInfo(CGM);
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119-
case llvm::Triple::le32:
120-
return createPNaClTargetCodeGenInfo(CGM);
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case llvm::Triple::m68k:
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return createM68kTargetCodeGenInfo(CGM);
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case llvm::Triple::mips:

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

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@@ -582,13 +582,6 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
582582
return new XLCXXABI(CGM);
583583

584584
case TargetCXXABI::GenericItanium:
585-
if (CGM.getContext().getTargetInfo().getTriple().getArch()
586-
== llvm::Triple::le32) {
587-
// For PNaCl, use ARM-style method pointers so that PNaCl code
588-
// does not assume anything about the alignment of function
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// pointers.
590-
return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true);
591-
}
592585
return new ItaniumCXXABI(CGM);
593586

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case TargetCXXABI::Microsoft:

‎clang/lib/Driver/ToolChains/Clang.cpp

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@@ -3928,12 +3928,6 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T,
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if (UseBuiltins)
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A->render(Args, CmdArgs);
39303930
}
3931-
3932-
// le32-specific flags:
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// -fno-math-builtin: clang should not convert math builtins to intrinsics
3934-
// by default.
3935-
if (TC.getArch() == llvm::Triple::le32)
3936-
CmdArgs.push_back("-fno-math-builtin");
39373931
}
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bool Driver::getDefaultModuleCachePath(SmallVectorImpl<char> &Result) {

‎clang/test/CodeGen/bitfield-access-pad.c

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@@ -16,7 +16,6 @@
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// Configs that have expensive unaligned access
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// Little Endian
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// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
19-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
2019

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// Big endian
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// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s

‎clang/test/CodeGen/bitfield-access-unit.c

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@@ -53,8 +53,8 @@
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// RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
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// RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
5555

56-
// Both le64-elf and m68-elf are strict alignment ISAs with 4-byte aligned
57-
// 64-bit or 2-byte aligned 32-bit integer types. This more compex to describe here.
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// m68-elf is a strict alignment ISA with 4-byte aligned 64-bit or 2-byte
57+
// aligned 32-bit integer types. This more compex to describe here.
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// If unaligned access is expensive don't stick these together.
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struct A {

‎clang/test/CodeGenCXX/bitfield-access-empty.cpp

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@@ -26,7 +26,6 @@
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// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
29-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s

‎clang/test/CodeGenCXX/bitfield-access-tail.cpp

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@@ -26,7 +26,6 @@
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// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
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// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
2828
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
29-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
3029
// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
3130
// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
3231
// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s

‎clang/test/Preprocessor/predefined-macros-no-warnings.c

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@@ -75,8 +75,6 @@
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-linux
7777
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-netbsd
78-
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le32-nacl
79-
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le64
8078
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc
8179
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-freebsd
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-netbsd

‎llvm/include/llvm/TargetParser/Triple.h

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@@ -88,8 +88,6 @@ class Triple {
8888
xtensa, // Tensilica: Xtensa
8989
nvptx, // NVPTX: 32-bit
9090
nvptx64, // NVPTX: 64-bit
91-
le32, // le32: generic little-endian 32-bit CPU (PNaCl)
92-
le64, // le64: generic little-endian 64-bit CPU (PNaCl)
9391
amdil, // AMDIL
9492
amdil64, // AMDIL with 64-bit pointers
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hsail, // AMD HSAIL

‎llvm/lib/TargetParser/Triple.cpp

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@@ -44,8 +44,6 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
4444
case hsail: return "hsail";
4545
case kalimba: return "kalimba";
4646
case lanai: return "lanai";
47-
case le32: return "le32";
48-
case le64: return "le64";
4947
case loongarch32: return "loongarch32";
5048
case loongarch64: return "loongarch64";
5149
case m68k: return "m68k";
@@ -199,9 +197,6 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
199197
case nvptx: return "nvvm";
200198
case nvptx64: return "nvvm";
201199

202-
case le32: return "le32";
203-
case le64: return "le64";
204-
205200
case amdil:
206201
case amdil64: return "amdil";
207202

@@ -434,8 +429,6 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
434429
.Case("xcore", xcore)
435430
.Case("nvptx", nvptx)
436431
.Case("nvptx64", nvptx64)
437-
.Case("le32", le32)
438-
.Case("le64", le64)
439432
.Case("amdil", amdil)
440433
.Case("amdil64", amdil64)
441434
.Case("hsail", hsail)
@@ -576,8 +569,6 @@ static Triple::ArchType parseArch(StringRef ArchName) {
576569
.Case("xcore", Triple::xcore)
577570
.Case("nvptx", Triple::nvptx)
578571
.Case("nvptx64", Triple::nvptx64)
579-
.Case("le32", Triple::le32)
580-
.Case("le64", Triple::le64)
581572
.Case("amdil", Triple::amdil)
582573
.Case("amdil64", Triple::amdil64)
583574
.Case("hsail", Triple::hsail)
@@ -908,8 +899,6 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
908899
case Triple::hsail:
909900
case Triple::kalimba:
910901
case Triple::lanai:
911-
case Triple::le32:
912-
case Triple::le64:
913902
case Triple::loongarch32:
914903
case Triple::loongarch64:
915904
case Triple::m68k:
@@ -1606,7 +1595,6 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
16061595
case llvm::Triple::hsail:
16071596
case llvm::Triple::kalimba:
16081597
case llvm::Triple::lanai:
1609-
case llvm::Triple::le32:
16101598
case llvm::Triple::loongarch32:
16111599
case llvm::Triple::m68k:
16121600
case llvm::Triple::mips:
@@ -1639,7 +1627,6 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
16391627
case llvm::Triple::bpfeb:
16401628
case llvm::Triple::bpfel:
16411629
case llvm::Triple::hsail64:
1642-
case llvm::Triple::le64:
16431630
case llvm::Triple::loongarch64:
16441631
case llvm::Triple::mips64:
16451632
case llvm::Triple::mips64el:
@@ -1698,7 +1685,6 @@ Triple Triple::get32BitArchVariant() const {
16981685
case Triple::hsail:
16991686
case Triple::kalimba:
17001687
case Triple::lanai:
1701-
case Triple::le32:
17021688
case Triple::loongarch32:
17031689
case Triple::m68k:
17041690
case Triple::mips:
@@ -1729,7 +1715,6 @@ Triple Triple::get32BitArchVariant() const {
17291715
case Triple::aarch64_be: T.setArch(Triple::armeb); break;
17301716
case Triple::amdil64: T.setArch(Triple::amdil); break;
17311717
case Triple::hsail64: T.setArch(Triple::hsail); break;
1732-
case Triple::le64: T.setArch(Triple::le32); break;
17331718
case Triple::loongarch64: T.setArch(Triple::loongarch32); break;
17341719
case Triple::mips64:
17351720
T.setArch(Triple::mips, getSubArch());
@@ -1784,7 +1769,6 @@ Triple Triple::get64BitArchVariant() const {
17841769
case Triple::bpfeb:
17851770
case Triple::bpfel:
17861771
case Triple::hsail64:
1787-
case Triple::le64:
17881772
case Triple::loongarch64:
17891773
case Triple::mips64:
17901774
case Triple::mips64el:
@@ -1808,7 +1792,6 @@ Triple Triple::get64BitArchVariant() const {
18081792
case Triple::arm: T.setArch(Triple::aarch64); break;
18091793
case Triple::armeb: T.setArch(Triple::aarch64_be); break;
18101794
case Triple::hsail: T.setArch(Triple::hsail64); break;
1811-
case Triple::le32: T.setArch(Triple::le64); break;
18121795
case Triple::loongarch32: T.setArch(Triple::loongarch64); break;
18131796
case Triple::mips:
18141797
T.setArch(Triple::mips64, getSubArch());
@@ -1851,8 +1834,6 @@ Triple Triple::getBigEndianArchVariant() const {
18511834
case Triple::hsail64:
18521835
case Triple::hsail:
18531836
case Triple::kalimba:
1854-
case Triple::le32:
1855-
case Triple::le64:
18561837
case Triple::loongarch32:
18571838
case Triple::loongarch64:
18581839
case Triple::msp430:
@@ -1956,8 +1937,6 @@ bool Triple::isLittleEndian() const {
19561937
case Triple::hsail64:
19571938
case Triple::hsail:
19581939
case Triple::kalimba:
1959-
case Triple::le32:
1960-
case Triple::le64:
19611940
case Triple::loongarch32:
19621941
case Triple::loongarch64:
19631942
case Triple::mips64el:

‎llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn

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Original file line numberDiff line numberDiff line change
@@ -108,7 +108,6 @@ static_library("Basic") {
108108
"Targets/DirectX.cpp",
109109
"Targets/Hexagon.cpp",
110110
"Targets/Lanai.cpp",
111-
"Targets/Le64.cpp",
112111
"Targets/LoongArch.cpp",
113112
"Targets/M68k.cpp",
114113
"Targets/MSP430.cpp",

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