@@ -249,14 +249,14 @@ void AMDGPUAsmPrinter::emitFunctionBodyEnd() {
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getNameWithPrefix (KernelName, &MF->getFunction ());
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getTargetStreamer ()->EmitAmdhsaKernelDescriptor (
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STM, KernelName, getAmdhsaKernelDescriptor (*MF, CurrentProgramInfo),
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- getMCExprValue ( CurrentProgramInfo.NumVGPRsForWavesPerEU , Context) ,
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- getMCExprValue (CurrentProgramInfo. NumSGPRsForWavesPerEU , Context) -
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- IsaInfo::getNumExtraSGPRs (
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- &STM, getMCExprValue (CurrentProgramInfo. VCCUsed , Context),
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- getMCExprValue ( CurrentProgramInfo.FlatUsed , Context) ,
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- getTargetStreamer ()->getTargetID ()->isXnackOnOrAny ()),
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- getMCExprValue (CurrentProgramInfo. VCCUsed , Context),
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- getMCExprValue ( CurrentProgramInfo.FlatUsed , Context) );
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+ CurrentProgramInfo.NumVGPRsForWavesPerEU ,
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+ MCBinaryExpr::createSub (
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+ CurrentProgramInfo. NumSGPRsForWavesPerEU ,
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+ AMDGPUVariadicMCExpr::createExtraSGPRs (
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+ CurrentProgramInfo.VCCUsed , CurrentProgramInfo. FlatUsed ,
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+ getTargetStreamer ()->getTargetID ()->isXnackOnOrAny (), Context ),
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+ Context),
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+ CurrentProgramInfo.VCCUsed , CurrentProgramInfo. FlatUsed );
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Streamer.popSection ();
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}
@@ -401,9 +401,10 @@ void AMDGPUAsmPrinter::emitCommonFunctionComments(
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false );
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}
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- uint16_t AMDGPUAsmPrinter::getAmdhsaKernelCodeProperties (
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+ const MCExpr * AMDGPUAsmPrinter::getAmdhsaKernelCodeProperties (
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const MachineFunction &MF) const {
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const SIMachineFunctionInfo &MFI = *MF.getInfo <SIMachineFunctionInfo>();
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+ MCContext &Ctx = MF.getContext ();
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uint16_t KernelCodeProperties = 0 ;
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const GCNUserSGPRUsageInfo &UserSGPRInfo = MFI.getUserSGPRInfo ();
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@@ -436,11 +437,19 @@ uint16_t AMDGPUAsmPrinter::getAmdhsaKernelCodeProperties(
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amdhsa::KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32;
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}
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- if (getMCExprValue (CurrentProgramInfo.DynamicCallStack , MF.getContext ()) &&
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- CodeObjectVersion >= AMDGPU::AMDHSA_COV5)
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- KernelCodeProperties |= amdhsa::KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK;
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-
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- return KernelCodeProperties;
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+ // CurrentProgramInfo.DynamicCallStack is a MCExpr and could be
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+ // un-evaluatable at this point so it cannot be conditionally checked here.
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+ // Instead, we'll directly shift the possibly unknown MCExpr into its place
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+ // and bitwise-or it into KernelCodeProperties.
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+ const MCExpr *KernelCodePropExpr =
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+ MCConstantExpr::create (KernelCodeProperties, Ctx);
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+ const MCExpr *OrValue = MCConstantExpr::create (
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+ amdhsa::KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK_SHIFT, Ctx);
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+ OrValue = MCBinaryExpr::createShl (CurrentProgramInfo.DynamicCallStack ,
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+ OrValue, Ctx);
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+ KernelCodePropExpr = MCBinaryExpr::createOr (KernelCodePropExpr, OrValue, Ctx);
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+
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+ return KernelCodePropExpr;
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}
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MCKernelDescriptor
@@ -463,11 +472,13 @@ AMDGPUAsmPrinter::getAmdhsaKernelDescriptor(const MachineFunction &MF,
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KernelDescriptor.compute_pgm_rsrc1 = PI.getComputePGMRSrc1 (STM, Ctx);
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KernelDescriptor.compute_pgm_rsrc2 = PI.getComputePGMRSrc2 (Ctx);
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- KernelDescriptor.kernel_code_properties =
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- MCConstantExpr::create (getAmdhsaKernelCodeProperties (MF), Ctx);
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+ KernelDescriptor.kernel_code_properties = getAmdhsaKernelCodeProperties (MF);
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- assert (STM.hasGFX90AInsts () ||
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- getMCExprValue (CurrentProgramInfo.ComputePGMRSrc3GFX90A , Ctx) == 0 );
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+ int64_t PGRM_Rsrc3 = 1 ;
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+ bool EvaluatableRsrc3 =
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+ CurrentProgramInfo.ComputePGMRSrc3GFX90A ->evaluateAsAbsolute (PGRM_Rsrc3);
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+ assert (STM.hasGFX90AInsts () || !EvaluatableRsrc3 ||
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+ static_cast <uint64_t >(PGRM_Rsrc3) == 0 );
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KernelDescriptor.compute_pgm_rsrc3 = CurrentProgramInfo.ComputePGMRSrc3GFX90A ;
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KernelDescriptor.kernarg_preload = MCConstantExpr::create (
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