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substitute oneuse class with HasOneUseUnaryOp
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-15
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2 files changed

+2
-15
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llvm/lib/Target/AMDGPU/SIInstructions.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3124,12 +3124,12 @@ def IMMBitSelConst : SDNodeXForm<imm, [{
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// Handle the VALU case.
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def : GCNPat <
3127-
(i1 (xor (i1 (DivergentUnaryFrag_oneuse<trunc> i32:$a)), -1)),
3127+
(i1 (xor (i1 (DivergentUnaryFrag<HasOneUseUnaryOp<trunc>> i32:$a)), -1)),
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(V_CMP_NE_U32_e64 (V_AND_B32_e64 (i32 1), i32:$a), (i32 1))
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>;
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31313131
def : GCNPat <
3132-
(i1 (xor (i1 (DivergentUnaryFrag_oneuse<trunc> i64:$a)), -1)),
3132+
(i1 (xor (i1 (DivergentUnaryFrag<HasOneUseUnaryOp<trunc>> i64:$a)), -1)),
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(V_CMP_NE_U32_e64 (V_AND_B32_e64 (i32 1),
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(i32 (EXTRACT_SUBREG $a, sub0))), (i32 1))
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>;

llvm/lib/Target/AMDGPU/VOPInstructions.td

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1267,19 +1267,6 @@ class DivergentUnaryFrag<SDPatternOperator Op> : PatFrag <
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let GISelPredicateCode = [{return true;}];
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}
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1270-
class DivergentUnaryFrag_oneuse<SDPatternOperator Op> : PatFrag <
1271-
(ops node:$src0),
1272-
(Op $src0),
1273-
[{ return N->isDivergent(); }]> {
1274-
// This check is unnecessary as it's captured by the result register
1275-
// bank constraint.
1276-
//
1277-
// FIXME: Should add a way for the emitter to recognize this is a
1278-
// trivially true predicate to eliminate the check.
1279-
let GISelPredicateCode = [{return true;}];
1280-
let HasOneUse = 1;
1281-
}
1282-
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class VOPPatOrNull<SDPatternOperator Op, VOPProfile P> {
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list<dag> ret = !if(!ne(P.NeedPatGen,PatGenMode.NoPattern), VOPPatGen<Op, P>.ret, []);
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}

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